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[PATCH 11/12] x86/HVM: address Misra 2.1 rule violations
- To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Fri, 28 Aug 2026 09:05:43 +0200
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- Cc: Nicola Vetrini <nicola.vetrini@xxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, Roger Pau Monné <roger@xxxxxxxxxxxxxx>
- Delivery-date: Fri, 28 Aug 2026 07:05:48 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
In hvm_set_cr3() the "bad_cr3" label is reachable only with
SHADOW_PAGING=y; the code being there is therefore a Misra rule 2.1
(unreachable code) violation when SHADOW_PAGING=n.
Similarly code past the initial switch() in hvm_debug_op() is reachable
only when CONFIG_INTEL_VMX=y.
No functional change.
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2455,6 +2455,7 @@ int hvm_set_cr3(unsigned long value, boo
return X86EMUL_OKAY;
bad_cr3:
+ BUILD_ERROR_IF_NOT(CONFIG_SHADOW_PAGING);
gdprintk(XENLOG_ERR, "Invalid CR3\n");
domain_crash(currd);
return X86EMUL_UNHANDLEABLE;
@@ -5201,6 +5202,8 @@ int hvm_debug_op(struct vcpu *v, int32_t
return -ENOSYS;
}
+ BUILD_ERROR_IF_NOT(CONFIG_INTEL_VMX);
+
vcpu_pause(v);
switch ( op )
|
