Re: [PATCH v1 16/17] xen/riscv: add guest load emulation for trapped MMIO accesses

[Jan Beulich <jbeulich@xxxxxxxx>]

On 20.08.2026 15:38, Oleksii Kurochko wrote:
> On 8/20/26 9:34 AM, Jan Beulich wrote:
>> On 19.08.2026 18:06, Oleksii Kurochko wrote:
>>> On 8/13/26 9:15 AM, Jan Beulich wrote:
>>>> On 29.07.2026 15:40, Oleksii Kurochko wrote:
>>>>> +        /*
>>>>> +         * Bit[0] == 0 implies trapped instruction value is
>>>>> +         * zero or special value.
>>>>> +         */
>>>>
>>>> How come you get away without dealing with pseudoinsns? The insn pointed at
>>>> by regs->sepc is of no interest for faults caused by implicit memory 
>>>> accesses
>>>> originating from VS-stage address translation.
>>>
>>> It is really problem but I think it should be resolved much earlier in
>>> handle_guest_page_fault(). I will add the following:
>>>
>>> /*
>>>        * A guest page fault taken on an implicit memory access performed for
>>>        * VS-stage address translation (reading a PTE, or updating its A/D
>>> bits)
>>>        * reports a pseudoinstruction in htinst rather than a transformed
>>>        * instruction. Such a fault can't be emulated: htval holds the guest
>>>        * physical address of a VS-stage PTE rather than of any access the
>>> guest
>>>        * itself performed (and its two least significant bits are zero
>>> instead
>>>        * of matching stval), while the instruction at sepc is unrelated
>>> to the
>>>        * access which actually faulted.
>>>        *
>>>        * Report an access fault to the guest at the original virtual 
>>> address,
>>>        * which is what stval already holds and what hardware would raise
>>> for a
>>>        * page table walk hitting an inaccessible address.
>>>        */
>>>       if ( (htinst == INSN_PSEUDO_VS_LOAD) || (htinst ==
>>> INSN_PSEUDO_VS_STORE) )
>>>       {
>>>           struct cpu_user_regs *regs = vcpu_guest_cpu_user_regs(current);
>>>           struct trap_info utrap = {
>>>               .scause = (htinst == INSN_PSEUDO_VS_LOAD) ? CAUSE_LOAD_ACCESS
>>>                                                         : 
>>> CAUSE_STORE_ACCESS,
>>>               .sepc = regs->sepc,
>>>               .stval = csr_read(CSR_STVAL),
>>>           };
>>>
>>>           riscv_trap_redirect(&utrap);
>>>           return;
>>>       }
>>
>> That's not what would happen on bare hardware though, aiui. At least I don't
>> think I ever found it being spelled out anywhere what the supposed behavior
>> is when a page table resides in unpopulated space.
> 
> What do you mean here by "unpopulated space"?

A physical address range neither populated by RAM nor used by MMIO of any 
device.

Jan