[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH for-4.22] xen/arm: propagate secondary GIC initialization failures


  • To: Mykola Kvach <mykola_kvach@xxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: "Orzel, Michal" <michal.orzel@xxxxxxx>
  • Date: Fri, 31 Jul 2026 09:49:07 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=epam.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0)
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=/BWJ7WrPWZmO47oVWsQSnUiYy1NbVK6P8zPGXR7TTuo=; b=o7QIATKyankAHXh8DXAmW2zzU1Q+vXu9sn49YDOyptHH6/SSqprFhu5yN/r20Nmo4vOT6MZSheuAZ0Bh64GonabC2Gy0hMRV47K9Q7r5TiFAFgDITapSJ7se16pRXH+gWglu2Obw/UvuGKI/aGBhNI1+fm78/g2LgkxFy/SEQ1F5PsOHXebXID8uXgu6tWOanuGvNH5+YDVfnnS4MFk/NYn7pf9kNQkhFgsuvVY9Bmbyz3kLauGsVc+mGh0P78cZ+KbcyAWXNCP2t+/8gL0+bOPBzIvJpUx6Dobgn2JPGvoFDbuZMnq4R6V5hPYJ6j9IDBOfD84pA0WoiVaerY+O6g==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=wj1ovunjkgu+Eh1LesLqNhaB9crt2YjopPsLPDRl+rYisSXYxC7OBD8azhjrxYrWyuJMfsvJ7Dv05+WGbLbk89/H/FBHt+oKxs6n7NBZFxQYyFbUZCcPnn0tJTV0fo4lYDcqqFhYOT1RQdf57js3nBK+YMsvozvl5B6ABHwrsiVJFEQ2iIW3wP5vPeaahHg2ycM5LMnPUQjQkNfxHtliuHNaMUQ8Nln/Fm/RsBV4pXk96/fFl1fe7I/mxkFJg213PpAQjEAQq0uMudIs31uJ6K3QKglALqBKdM3luoWxNHN0/SlojiTvtz9LxyZPjFrLP/3x90zgXNwObYdnp4tq2w==
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=amd.com header.i="@amd.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
  • Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Fri, 31 Jul 2026 07:49:37 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>


On 22-Jul-26 13:04, Orzel, Michal wrote:
> 
> 
> On 10-Jul-26 12:20, Mykola Kvach wrote:
>> The GICv3 secondary_init() callback can fail while discovering or
>> waking a Redistributor, enabling LPIs, or setting up an ITS collection.
>> gic_init_secondary_cpu() currently discards that status. start_secondary()
>> then marks the CPU online even though its per-CPU GIC interface may be
>> unusable.
>>
>> Return the callback status through the common GIC layer. Have
>> start_secondary() report the failure and stop the affected CPU before it
>> is added to cpu_online_map.
>>
>> Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3")
>> Signed-off-by: Mykola Kvach <mykola_kvach@xxxxxxxx>
>> ---
>>  xen/arch/arm/gic.c             | 10 ++++++++--
>>  xen/arch/arm/include/asm/gic.h |  2 +-
>>  xen/arch/arm/smpboot.c         |  9 ++++++++-
>>  3 files changed, 17 insertions(+), 4 deletions(-)
>>
>> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
>> index ee75258fc3..078049e741 100644
>> --- a/xen/arch/arm/gic.c
>> +++ b/xen/arch/arm/gic.c
>> @@ -282,11 +282,17 @@ void smp_send_state_dump(unsigned int cpu)
>>  }
>>  
>>  /* Set up the per-CPU parts of the GIC for a secondary CPU */
>> -void gic_init_secondary_cpu(void)
>> +int gic_init_secondary_cpu(void)
>>  {
>> -    gic_hw_ops->secondary_init();
>> +    int rc = gic_hw_ops->secondary_init();
>> +
>> +    if ( rc )
>> +        return rc;
>> +
>>      /* Clear LR mask for secondary cpus */
>>      clear_cpu_lr_mask();
>> +
>> +    return 0;
>>  }
>>  
>>  /* Shut down the per-CPU GIC interface */
>> diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h
>> index ff22dea40d..ee2c26adb4 100644
>> --- a/xen/arch/arm/include/asm/gic.h
>> +++ b/xen/arch/arm/include/asm/gic.h
>> @@ -291,7 +291,7 @@ extern void gic_preinit(void);
>>  /* Bring up the interrupt controller, and report # cpus attached */
>>  extern void gic_init(void);
>>  /* Bring up a secondary CPU's per-CPU GIC interface */
>> -extern void gic_init_secondary_cpu(void);
>> +extern int gic_init_secondary_cpu(void);
>>  /* Take down a CPU's per-CPU GIC interface */
>>  extern void gic_disable_cpu(void);
>>  /* setup the gic virtual interface for a guest */
>> diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
>> index ba5fd2dd52..5e23b0b6a9 100644
>> --- a/xen/arch/arm/smpboot.c
>> +++ b/xen/arch/arm/smpboot.c
>> @@ -319,6 +319,7 @@ smp_prepare_cpus(void)
>>  void asmlinkage noreturn start_secondary(void)
>>  {
>>      unsigned int cpuid = init_data.cpuid;
>> +    int rc;
>>  
>>      memset(get_cpu_info(), 0, sizeof (struct cpu_info));
>>  
>> @@ -373,7 +374,13 @@ void asmlinkage noreturn start_secondary(void)
>>       */
>>      update_system_features(&current_cpu_data);
>>  
>> -    gic_init_secondary_cpu();
>> +    rc = gic_init_secondary_cpu();
>> +    if ( rc )
>> +    {
>> +        printk(XENLOG_ERR "CPU%u: Failed to initialize the GIC: %d\n",
>> +               cpuid, rc);
> NIT: While functionally identical, for consistency with the neighbouring
> messages you may want to use smp_processor_id() here instead of cpuid. I can
> change on commit.
> 
> Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
I was about to commit this patch when I realized that it should be moved above
update_system_features() as the comment above it suggests i.e. we should update
system features only if we do not stop the core. Please send a v2 with remarks
addressed.

~Michal




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.