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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v3 16/18] ehci-dbgp: Use pci_sbdf_t instead of (bus, slot, func)
We also take the opportunity to allow the device to exist outside
of segment 0 (only when specified with pci@ syntax), since it's
not hardcoded anymore.
Signed-off-by: Teddy Astie <teddy.astie@xxxxxxxxxx>
---
xen/drivers/char/ehci-dbgp.c | 100 +++++++++++++----------------------
1 file changed, 37 insertions(+), 63 deletions(-)
diff --git a/xen/drivers/char/ehci-dbgp.c b/xen/drivers/char/ehci-dbgp.c
index ab1e3c6de4..01586bc5b3 100644
--- a/xen/drivers/char/ehci-dbgp.c
+++ b/xen/drivers/char/ehci-dbgp.c
@@ -334,8 +334,9 @@ struct ehci_dbgp {
unsigned long timeout;
struct timer timer;
spinlock_t *lock;
+ pci_sbdf_t sbdf;
bool reset_run;
- u8 bus, slot, func, bar;
+ u8 bar;
u16 pci_cr;
u32 bar_val;
unsigned int cap;
@@ -681,16 +682,14 @@ static int dbgp_control_msg(struct ehci_dbgp *dbgp,
unsigned int devnum,
return ret;
}
-static unsigned int __init __find_dbgp(u8 bus, u8 slot, u8 func)
+static unsigned int __init __find_dbgp(pci_sbdf_t sbdf)
{
- uint32_t class = pci_conf_read32(PCI_SBDF(0, bus, slot, func),
- PCI_CLASS_REVISION);
+ uint32_t class = pci_conf_read32(sbdf, PCI_CLASS_REVISION);
if ( (class >> 8) != PCI_CLASS_SERIAL_USB_EHCI )
return 0;
- return pci_find_cap_offset(PCI_SBDF(0, bus, slot, func),
- PCI_CAP_ID_EHCI_DEBUG);
+ return pci_find_cap_offset(sbdf, PCI_CAP_ID_EHCI_DEBUG);
}
static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp,
@@ -704,27 +703,25 @@ static unsigned int __init find_dbgp(struct ehci_dbgp
*dbgp,
{
for ( func = 0; func < 8; func++ )
{
+ pci_sbdf_t sbdf = PCI_SBDF(0, bus, slot, func);
unsigned int cap;
- if ( !pci_device_detect(PCI_SBDF(0, bus, slot, func)) )
+ if ( !pci_device_detect(sbdf) )
{
if ( !func )
break;
continue;
}
- cap = __find_dbgp(bus, slot, func);
+ cap = __find_dbgp(sbdf);
if ( !cap || ehci_num-- )
{
- if ( !func && !(pci_conf_read8(PCI_SBDF(0, bus, slot,
func),
- PCI_HEADER_TYPE) & 0x80) )
+ if ( !func && !(pci_conf_read8(sbdf, PCI_HEADER_TYPE) &
0x80) )
break;
continue;
}
- dbgp->bus = bus;
- dbgp->slot = slot;
- dbgp->func = func;
+ dbgp->sbdf = sbdf;
return cap;
}
}
@@ -1011,20 +1008,17 @@ static set_debug_port_t __read_mostly set_debug_port =
default_set_debug_port;
static void cf_check nvidia_set_debug_port(
struct ehci_dbgp *dbgp, unsigned int port)
{
- uint32_t dword = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot,
- dbgp->func), 0x74);
+ uint32_t dword = pci_conf_read32(dbgp->sbdf, 0x74);
dword &= ~(0x0f << 12);
dword |= (port & 0x0f) << 12;
- pci_conf_write32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), 0x74,
- dword);
+ pci_conf_write32(dbgp->sbdf, 0x74, dword);
dbgp_printk("set debug port to %u\n", port);
}
static void __init detect_set_debug_port(struct ehci_dbgp *dbgp)
{
- if ( pci_conf_read16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- PCI_VENDOR_ID) == 0x10de )
+ if ( pci_conf_read16(dbgp->sbdf, PCI_VENDOR_ID) == 0x10de )
{
dbgp_printk("using nvidia set_debug_port\n");
set_debug_port = nvidia_set_debug_port;
@@ -1046,15 +1040,13 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp
*dbgp, u32 hcc_params)
if ( !offset )
return;
- cap = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- offset);
+ cap = pci_conf_read32(dbgp->sbdf, offset);
dbgp_printk("dbgp: EHCI BIOS state %08x\n", cap);
if ( (cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS) )
{
dbgp_printk("dbgp: BIOS handoff\n");
- pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- offset + 3, 1);
+ pci_conf_write8(dbgp->sbdf, offset + 3, 1);
}
/* if boot firmware now owns EHCI, spin till it hands it over. */
@@ -1063,8 +1055,7 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp
*dbgp, u32 hcc_params)
{
mdelay(10);
msec -= 10;
- cap = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- offset);
+ cap = pci_conf_read32(dbgp->sbdf, offset);
}
if ( cap & EHCI_USBLEGSUP_BIOS )
@@ -1072,13 +1063,11 @@ static void ehci_dbgp_bios_handoff(struct ehci_dbgp
*dbgp, u32 hcc_params)
/* well, possibly buggy BIOS... try to shut it down,
* and hope nothing goes too wrong */
dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
- pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- offset + 2, 0);
+ pci_conf_write8(dbgp->sbdf, offset + 2, 0);
}
/* just in case, always disable EHCI SMIs */
- pci_conf_write8(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- offset + EHCI_USBLEGCTLSTS, 0);
+ pci_conf_write8(dbgp->sbdf, offset + EHCI_USBLEGCTLSTS, 0);
}
static int ehci_dbgp_setup(struct ehci_dbgp *dbgp)
@@ -1320,19 +1309,15 @@ static void __init cf_check
ehci_dbgp_init_preirq(struct serial_port *port)
u32 debug_port, offset;
void __iomem *ehci_bar;
- debug_port = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot,
dbgp->func),
- dbgp->cap);
+ debug_port = pci_conf_read32(dbgp->sbdf, dbgp->cap);
offset = (debug_port >> 16) & 0xfff;
/* double check if the mem space is enabled */
- dbgp->pci_cr = pci_conf_read8(PCI_SBDF(0, dbgp->bus, dbgp->slot,
- dbgp->func),
- PCI_COMMAND);
+ dbgp->pci_cr = pci_conf_read8(dbgp->sbdf, PCI_COMMAND);
if ( !(dbgp->pci_cr & PCI_COMMAND_MEMORY) )
{
dbgp->pci_cr |= PCI_COMMAND_MEMORY;
- pci_conf_write16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- PCI_COMMAND, dbgp->pci_cr);
+ pci_conf_write16(dbgp->sbdf, PCI_COMMAND, dbgp->pci_cr);
dbgp_printk("MMIO for EHCI enabled\n");
}
@@ -1376,7 +1361,7 @@ static void __init cf_check ehci_dbgp_init_postirq(struct
serial_port *port)
ehci_dbgp_setup_postirq(dbgp);
- pci_hide_device(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func));
+ pci_hide_device(dbgp->sbdf);
}
static int ehci_dbgp_check_release(struct ehci_dbgp *dbgp)
@@ -1397,8 +1382,7 @@ static int ehci_dbgp_check_release(struct ehci_dbgp *dbgp)
* so as to allow for reuse of the USB device, which means it is time
* to shutdown the USB debug port.
*/
- printk(XENLOG_INFO "Releasing EHCI debug port at %02x:%02x.%u\n",
- dbgp->bus, dbgp->slot, dbgp->func);
+ printk(XENLOG_INFO "Releasing EHCI debug port at %pp\n", &dbgp->sbdf);
if ( dbgp->timer.function )
kill_timer(&dbgp->timer);
@@ -1431,9 +1415,7 @@ static void cf_check ehci_dbgp_suspend(struct serial_port
*port)
stop_timer(&dbgp->timer);
dbgp->timer.expires = 0;
- dbgp->pci_cr = pci_conf_read16(PCI_SBDF(0, dbgp->bus, dbgp->slot,
- dbgp->func),
- PCI_COMMAND);
+ dbgp->pci_cr = pci_conf_read16(dbgp->sbdf, PCI_COMMAND);
dbgp->state = dbgp_unsafe;
}
@@ -1445,10 +1427,8 @@ static void cf_check ehci_dbgp_resume(struct serial_port
*port)
if ( !dbgp->ehci_debug )
return;
- pci_conf_write32(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func), dbgp->bar,
- dbgp->bar_val);
- pci_conf_write16(PCI_SBDF(0, dbgp->bus, dbgp->slot, dbgp->func),
- PCI_COMMAND, dbgp->pci_cr);
+ pci_conf_write32(dbgp->sbdf, dbgp->bar, dbgp->bar_val);
+ pci_conf_write16(dbgp->sbdf, PCI_COMMAND, dbgp->pci_cr);
ehci_dbgp_setup_preirq(dbgp);
ehci_dbgp_setup_postirq(dbgp);
@@ -1505,36 +1485,31 @@ void __init ehci_dbgp_init(void)
if ( !dbgp->cap )
return;
- dbgp_printk("Found EHCI debug port on %02x:%02x.%u\n",
- dbgp->bus, dbgp->slot, dbgp->func);
+ dbgp_printk("Found EHCI debug port on %pp\n", &dbgp->sbdf);
}
else if ( strncmp(opt_dbgp + 4, "@pci", 4) == 0 )
{
- unsigned int bus, slot, func;
+ pci_sbdf_t sbdf;
- e = parse_pci(opt_dbgp + 8, NULL, &bus, &slot, &func);
+ e = parse_pci(opt_dbgp + 8, &sbdf);
if ( !e || *e )
return;
- dbgp->bus = bus;
- dbgp->slot = slot;
- dbgp->func = func;
+ dbgp->sbdf = sbdf;
- if ( !pci_device_detect(PCI_SBDF(0, bus, slot, func)) )
+ if ( !pci_device_detect(sbdf) )
return;
- dbgp->cap = __find_dbgp(bus, slot, func);
+ dbgp->cap = __find_dbgp(sbdf);
if ( !dbgp->cap )
return;
- dbgp_printk("Using EHCI debug port on %02x:%02x.%u\n",
- bus, slot, func);
+ dbgp_printk("Using EHCI debug port on %pp\n", &sbdf);
}
else
return;
- debug_port = pci_conf_read32(PCI_SBDF(0, dbgp->bus, dbgp->slot,
dbgp->func),
- dbgp->cap);
+ debug_port = pci_conf_read32(dbgp->sbdf, dbgp->cap);
dbgp->bar = (debug_port >> 29) & 0x7;
dbgp->bar = ((dbgp->bar - 1) * 4) + PCI_BASE_ADDRESS_0;
offset = (debug_port >> 16) & 0xfff;
@@ -1545,8 +1520,7 @@ void __init ehci_dbgp_init(void)
return;
}
- dbgp->bar_val = bar_val = pci_conf_read32(PCI_SBDF(0, dbgp->bus,
dbgp->slot,
- dbgp->func), dbgp->bar);
+ dbgp->bar_val = bar_val = pci_conf_read32(dbgp->sbdf, dbgp->bar);
dbgp_printk("bar_val: %08x\n", bar_val);
if ( bar_val & ~PCI_BASE_ADDRESS_MEM_MASK )
{
@@ -1573,8 +1547,8 @@ int dbgp_op(const struct physdev_dbgp_op *op)
case PHYSDEVOP_DBGP_BUS_UNKNOWN:
break;
case PHYSDEVOP_DBGP_BUS_PCI:
- if ( op->u.pci.seg || ehci_dbgp.bus != op->u.pci.bus ||
- PCI_DEVFN(ehci_dbgp.slot, ehci_dbgp.func) != op->u.pci.devfn )
+ if ( PCI_SBDF(op->u.pci.seg, op->u.pci.bus, op->u.pci.devfn).sbdf !=
+ ehci_dbgp.sbdf.sbdf )
default:
return 0;
break;
--
2.54.0
--
Teddy Astie | Vates XCP-ng Developer
XCP-ng & Xen Orchestra - Vates solutions
web: https://vates.tech
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