[PATCH] xen/riscv: fix sstc init to write vstimecmp instead of stimecmp

[Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx>]

Commit <25e03273069036f5b46e14bbdf396ac79805d07e> mistakenly wrote to
CSR_STIMECMP during sstc initialization instead of CSR_VSTIMECMP.

CSR_VSTIMECMP is the VS-level timer comparator: the hardware fires a
VS-timer interrupt whenever (time + htimedelta) >= vstimecmp. Writing
to CSR_STIMECMP leaves CSR_VSTIMECMP uninitialized, so its reset value
may immediately satisfy this condition, generating spurious VS-timer
interrupts before any guest has programmed the timer.

Fix this by writing the ULONG_MAX value to CSR_VSTIMECMP as intended.

Signed-off-by: Baptiste Le Duc <baptiste.le-duc@xxxxxxxxxx>
---
 xen/arch/riscv/time.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c
index 8769709e52..10b7e35f13 100644
--- a/xen/arch/riscv/time.c
+++ b/xen/arch/riscv/time.c
@@ -101,6 +101,6 @@ void __init preinit_xen_time(void)
          * Thereby to avoid spurious VS-timer irqs set vstimecmp CSR to
          * ULONG_MAX.
          */
-        csr_write64(CSR_STIMECMP, ULONG_MAX);
+        csr_write64(CSR_VSTIMECMP, ULONG_MAX);
     }
 }
-- 
2.54.0