[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v3] iommu/amd-vi: do not zero IOMMU MMIO region


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Thu, 7 May 2026 10:46:30 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=/OSd2sYHiKFEwBt3Q3Vas+8kZy+/6bgRuiLOdk04cxg=; b=q8bGH4jVG32/JKHnvrfEZG+f3iZkptEAiH47NYX1d1l5+lPejOxYlQfQ7iwMqCVo+4jGVzz7rbHQHL7aMFKsZck9JKm9SKt8/6BxH6aX/bzJOvwedCD0udfVDabA7kiaZCjMpOOva3d2Afn7ejEewdBe0O6/avI9U3GotO/9s47jf6ab8AAFjl5ZXRF6icpKL6T3s06VmvKlOWcWW29VQ68Xq6b9SRIHqLOfibZjS8lM+fQABtmdEH+hbeAUng3n0Ik+wqhSVCk422hiW5Q2RICyaoD41hpCzXBgoO++HsC77NYQf9B1s47R8sKmanLpkGZ3kViW7tKDJjSFRXNPXQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=NMvGUzGxrIRqRxW9RZBpqAuvmppC7xKIT2/BGG38Ks7U0kELSeZjrMe9+SRr4XL3rlEYuQFTINuUtsoYC5pDhjTMBL9fGC0Ja3+vRxq33s+POrzxoUmaSaEbp8NRNDyiAWkGSdUAsIN93Mf8odbcmctIdZpF8fj3JFqIpKZEDYRFSzdfJIpmTshPB/YIN/xhbULCz0rv5mg1PmrEm0IPFohQ5Fslc2oBxp/KGyEsAngoUTG9WRgoN+5MpUELEDZFwl4R3Z2qrW4YaNEDLHiAYKPs7ZCwIdvEcXD5EEpHs+VI5bJ7a11naXzRfx7YxO+MYqDCvwDzQu2Sp+tc23uI1w==
  • Authentication-results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=citrix.com header.i="@citrix.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck"
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
  • Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Jason Andryuk <jason.andryuk@xxxxxxx>, Teddy Astie <teddy.astie@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Thu, 07 May 2026 08:46:51 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote:
> On 06.05.2026 18:51, Roger Pau Monne wrote:
> > Attempting to memset the whole IOMMU MMIO region to zero is dangerous to
> > say the least.  We don't know what registers might be there, nor which
> > values might be safe for those registers.  On a forthcoming platform doing
> > the zeroing of the MMIO region does put the IOMMU in a broken state, which
> > is not recoverable by the IOMMU initialization procedure in Xen.
> > 
> > Instead just zero the control register, which mimics the current behavior
> > with regards to how the control register is handled, and ensures the IOMU
> > setup is done with the unit disabled.  This approach will need revisiting
> > in order to support Preboot DMA Protection.
> > 
> > Fold map_iommu_mmio_region() into its only caller, as the function body is
> > just an ioremap() call after the removal of the memset().
> > 
> > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor")
> > Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> 
> While you got Andrew's R-b, I don't view that as enough to commit it. My
> prior concern towards ...
> 
> > --- a/xen/drivers/passthrough/amd/iommu_init.c
> > +++ b/xen/drivers/passthrough/amd/iommu_init.c
> > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, 
> > u8 mask)
> >      return iommu->ht_flags & mask;
> >  }
> >  
> > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu)
> > -{
> > -    iommu->mmio_base = ioremap(iommu->mmio_base_phys,
> > -                               IOMMU_MMIO_REGION_LENGTH);
> > -    if ( !iommu->mmio_base )
> > -        return -ENOMEM;
> > -
> > -    memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH);
> > -
> > -    return 0;
> > -}
> 
> ... this part of the change wasn't addressed, neither verbally nor by an
> adjustment to the description of what was committed. As previously stated,
> blindly memset()-ing the entire area may not be the best of all options,
> but the downsides of not doing this need to somehow be addressed. As
> indicated, once they run out of bits in the main control register, they
> likely will add a 2nd one. That'll then also need clearing, yet we have
> no code to do so anymore.

I could introduce an opt-in command line option that forces the
zeroing of the MMIO region (to have the option to resort to the
previous behavior), but I was (wrongly) under the impression that we
have agreement the proposed approach was the least bad of the ones
available, sorry.

Note how VT-d also doesn't zero the IOMMU registers MMIO page either,
neither does it seems to zero the Global Command Register either,
which I'm not saying it's correct, but is at least a (possibly wrong)
precedent.  I don't think there's much we can do with the handling of
enabled bits in possibly registers not know/handled by Xen.  Like on
VT-d, we possibly need to rely on the firmware to handle the IOMMU in
a half-sane configuration, with no enabled features on registers Xen
doesn't know about.

Regards, Roger.



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.