Re: [PATCH] xen/arm64: flushtlb: Optimize ARM64_WORKAROUND_REPEAT_TLBI

[Julien Grall <julien@xxxxxxx>]

Hi Michal,

On 14/04/2026 09:11, Michal Orzel wrote:
> Rework the workaround logic as follows:
>   - add TLB_HELPER_LOCAL() to be used for local TLB ops without a
>     workaround,
>   - modify TLB_HELPER() workaround to use tlbi vale2is, xzr as a second
>     TLB,
>   - drop TLB_HELPER_VA(). It's used only by __flush_xen_tlb_one_local
>     which is local and does not need workaround and by
>     __flush_xen_tlb_one. In the latter case, since it's used in a loop,
>     we don't need a workaround in the middle. Add __tlb_repeat_sync with
>     a workaround to be used at the end after DSB and before final ISB,
>   - TLBI VALE2IS passing XZR is used as an additional TLBI. While there is
>     an identity mapping there, it's used very rarely. The performance
>     impact is therefore negligible. If things change in the future, we
>     can revisit the decision.
Can you document the use of 0 in arch/arm/include/asm/mmu/layout.h as well?

> Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx>
Reviewed-by: Julien Grall <jgrall@xxxxxxxxxx>

Cheers,

--
Julien Grall