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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH] x86/cpu-policy: Filter out OS{XSAVE,PKE} in calculate_raw_cpu_policy()
They're dynamic too, and don't have named fields because no (other) logic in
Xen ought to operate on them. In particular, OSPKE being visible depending on
whether we're in HVM or PV vCPU context when scanning.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
More fallout from XenServer's rescan capability, this time running with a PVH
dom0. OSXSAVE was accounted for before by being force-enabled, and is wrong,
hence the adjustment here too.
The othe two fields Intel list as dynamic are AESKLE (which we don't have
infrsatructure for yet), and SYSCALL (based on %cs.l) which I have no interest
in treating like a generally variable bit.
---
xen/arch/x86/cpu-policy.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c
index 372d11f2ff20..5273fe0ae435 100644
--- a/xen/arch/x86/cpu-policy.c
+++ b/xen/arch/x86/cpu-policy.c
@@ -345,9 +345,13 @@ void calculate_raw_cpu_policy(void)
ASSERT(p->x86_vendor == boot_cpu_data.vendor);
/*
- * Clear the truly dynamic fields. These vary with the in-context XCR0
- * and MSR_XSS, and aren't interesting fields in the raw policy.
+ * Clear the truly dynamic fields.
+ *
+ * - The OS* bits are forwards from CR4.
+ * - The xstate fields are calculated from XCR0 and MSR_XSS.
*/
+ p->basic.raw[1].c &= ~cpufeat_mask(X86_FEATURE_OSXSAVE);
+ p->feat.raw[0].c &= ~cpufeat_mask(X86_FEATURE_OSPKE);
p->xstate.raw[0].b = 0;
p->xstate.raw[1].b = 0;
base-commit: 6d1180b1499145fcb8f3099c1ab4b7305aba2ed4
prerequisite-patch-id: c5070338424f36d973c1b0fb9f6419682c48ee03
--
2.39.5
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