Re: [PATCH v1 05/15] xen/riscv: implement stub for smp_send_event_check_mask()

[Jan Beulich <jbeulich@xxxxxxxx>]

On 13.01.2026 10:58, Oleksii Kurochko wrote:
> 
> On 1/12/26 6:05 PM, Jan Beulich wrote:
>> On 12.01.2026 17:53, Oleksii Kurochko wrote:
>>> On 1/7/26 4:47 PM, Jan Beulich wrote:
>>>> On 24.12.2025 18:03, Oleksii Kurochko wrote:
>>>>> @@ -13,3 +14,10 @@
>>>>>    struct pcpu_info pcpu_info[NR_CPUS] = { [0 ... NR_CPUS - 1] = {
>>>>>        .processor_id = NR_CPUS,
>>>>>    }};
>>>>> +
>>>>> +void smp_send_event_check_mask(const cpumask_t *mask)
>>>>> +{
>>>>> +#if CONFIG_NR_CPUS > 1
>>>>> +# error "smp_send_event_check_mask() unimplemented"
>>>>> +#endif
>>>>> +}
>>>> CONFIG_NR_CPUS is 64 by default for 64-bit arch-es, from all I can tell, 
>>>> also
>>>> for RISC-V. And there's no "override" in riscv64_defconfig. How is the 
>>>> above
>>>> going to work in CI? Then again I must be overlooking something, as the 
>>>> config
>>>> used in CI has CONFIG_NR_CPUS=1. Just that I can't tell why that is.
>>> It is 1 because of the defintion of NR_CPUS in KConfig:
>>> config NR_CPUS
>>>     int "Maximum number of CPUs"
>>>     range 1 1 if ARM && MPU
>>>     range 1 16383
>>>           .... ( all other range props are condtional and there is no 
>>> RISC-V in dependency)
>>> so for RISC-V "range 1 16383" used and CONFIG_NR_CPUS is set to the minimal 
>>> of this range,
>>> so it is 1.
>> I fear I don't follow: Why would the lowest value be picked, rather than the
>> specified default (which would be 64 for RV64)? That's what I thought the
>> default values are there (among other purposes).
> 
> But there is no default for RISC-V for config NR_CPUS:
> 
>    config NR_CPUS
>         int "Maximum number of CPUs"
>         range 1 1 if ARM && MPU
>         range 1 16383
>         default "256" if X86
>         default "1" if ARM && MPU
>         default "8" if ARM && RCAR3
>         default "4" if ARM && QEMU
>         default "4" if ARM && MPSOC
>         default "128" if ARM
>         help
>           ...

Oh, indeed, that's what I was overlooking.

> So a value from range [1, 16383] is chosen and based on the code of 
> sym_validate_range():
>          ...
>       val = strtoll(sym->curr.val, NULL, base);
>       val2 = sym_get_range_val(prop->expr->left.sym, base);
>       if (val >= val2) {
>               val2 = sym_get_range_val(prop->expr->right.sym, base);
>               if (val <= val2)
>                       return;
>       }
>       if (sym->type == S_INT)
>               sprintf(str, "%lld", val2);
>       else
>               sprintf(str, "0x%llx", val2);
>          sym->curr.val = xstrdup(str);
> 
> First initialization of val2 it is the left value of the range [1, 16383],so 
> it is 1
> and val is 0 (I assume so that it is by initialization 0), thereby val2 = 1 
> will be
> used as a value for NR_CPUS.

But is this behavior documented anywhere? Wouldn't RISC-V (and PPC) better
gain suitable defaults, making explicit what is wanted (for the time being)?
E.g.

config NR_CPUS
        int "Maximum number of CPUs"
        range 1 1 if ARM && MPU
        range 1 16383
        default "256" if X86
        default "1" if !ARM || MPU
        default "8" if RCAR3
        default "4" if QEMU
        default "4" if MPSOC
        default "128"

Jan