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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v4 2/2] xen/x86: move d->arch.physaddr_bitsize field handling into pv32
From: Grygorii Strashko <grygorii_strashko@xxxxxxxx>
The d->arch.physaddr_bitsize field is used only by PV32 code, so move
d->arch.physaddr_bitsize field under PV32 ifdef into struct pv_domain.
Signed-off-by: Grygorii Strashko <grygorii_strashko@xxxxxxxx>
---
changes in v4:
- rebase
- new patch
xen/arch/x86/include/asm/domain.h | 6 +++---
xen/arch/x86/include/asm/mm.h | 4 ++--
xen/arch/x86/pv/dom0_build.c | 7 +++++--
xen/arch/x86/pv/domain.c | 2 +-
4 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/xen/arch/x86/include/asm/domain.h
b/xen/arch/x86/include/asm/domain.h
index 7e5cbd11a464..16cd45cc32c0 100644
--- a/xen/arch/x86/include/asm/domain.h
+++ b/xen/arch/x86/include/asm/domain.h
@@ -290,6 +290,9 @@ struct pv_domain
#ifdef CONFIG_PV32
unsigned int hv_compat_vstart;
+
+ /* Maximum physical-address bitwidth supported by this guest. */
+ unsigned int physaddr_bitsize;
#endif
/* map_domain_page() mapping cache. */
@@ -319,9 +322,6 @@ struct arch_domain
{
struct page_info *perdomain_l3_pg;
- /* Maximum physical-address bitwidth supported by this guest. */
- unsigned int physaddr_bitsize;
-
/* I/O-port admin-specified access capabilities. */
struct rangeset *ioport_caps;
uint32_t pci_cf8;
diff --git a/xen/arch/x86/include/asm/mm.h b/xen/arch/x86/include/asm/mm.h
index 89e8940c3316..734e6b3af1d6 100644
--- a/xen/arch/x86/include/asm/mm.h
+++ b/xen/arch/x86/include/asm/mm.h
@@ -624,8 +624,8 @@ extern int memory_add(unsigned long spfn, unsigned long
epfn, unsigned int pxm);
struct domain *_d = (d);
\
\
((_d &&
\
- _d->arch.physaddr_bitsize)
\
- ? min_t(unsigned int, _d->arch.physaddr_bitsize, bits)
\
+ _d->arch.pv.physaddr_bitsize)
\
+ ? min_t(unsigned int, _d->arch.pv.physaddr_bitsize, bits)
\
: bits);
\
})
#endif
diff --git a/xen/arch/x86/pv/dom0_build.c b/xen/arch/x86/pv/dom0_build.c
index 418b453ba8bf..9a11a0a16b4e 100644
--- a/xen/arch/x86/pv/dom0_build.c
+++ b/xen/arch/x86/pv/dom0_build.c
@@ -626,8 +626,10 @@ static int __init dom0_construct(const struct boot_domain
*bd)
initrd_mfn = paddr_to_pfn(initrd->start);
mfn = initrd_mfn;
count = PFN_UP(initrd_len);
- if ( d->arch.physaddr_bitsize &&
- ((mfn + count - 1) >> (d->arch.physaddr_bitsize - PAGE_SHIFT)) )
+
+#ifdef CONFIG_PV32
+ if ( d->arch.pv.physaddr_bitsize &&
+ ((mfn + count - 1) >> (d->arch.pv.physaddr_bitsize - PAGE_SHIFT))
)
{
order = get_order_from_pages(count);
page = alloc_domheap_pages(d, order, MEMF_no_scrub);
@@ -650,6 +652,7 @@ static int __init dom0_construct(const struct boot_domain
*bd)
initrd->start = pfn_to_paddr(initrd_mfn);
}
else
+#endif
{
while ( count-- )
if ( assign_pages(mfn_to_page(_mfn(mfn++)), 1, d, 0) )
diff --git a/xen/arch/x86/pv/domain.c b/xen/arch/x86/pv/domain.c
index ca5f6920516e..01499582d2d6 100644
--- a/xen/arch/x86/pv/domain.c
+++ b/xen/arch/x86/pv/domain.c
@@ -257,7 +257,7 @@ int switch_compat(struct domain *d)
d->arch.pv.hv_compat_vstart = __HYPERVISOR_COMPAT_VIRT_START;
if ( MACH2PHYS_COMPAT_NR_ENTRIES(d) < max_page )
- d->arch.physaddr_bitsize =
+ d->arch.pv.physaddr_bitsize =
/* 2^n entries can be contained in guest's p2m mapping space */
fls(MACH2PHYS_COMPAT_NR_ENTRIES(d)) - 1 + PAGE_SHIFT;
--
2.34.1
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