Re: [PATCH 5/6] arm: Use secure hypervisor timer in MPU system

["Orzel, Michal" <michal.orzel@xxxxxxx>]

On 28/11/2025 10:58, Harry Ramsey wrote:
> From: Penny Zheng <Penny.Zheng@xxxxxxx>
> 
> As MPU systems only have one secure state, we have to use secure EL2
> hypervisor timer for Xen in secure EL2.
> 
> In this patch, we introduce a new Kconfig option ARM_SECURE_STATE
> and a set of secure hypervisor timer registers CNTHPS_*_EL2.
> We alias CNTHP_*_EL2 to CNTHPS_*_EL2 to keep the timer code
> flow unchanged.
> 
> Signed-off-by: Penny Zheng <penny.zheng@xxxxxxx>
> Signed-off-by: Wei Chen <wei.chen@xxxxxxx>
> Signed-off-by: Luca Fancellu <luca.fancellu@xxxxxxx>
> Signed-off-by: Harry Ramsey <harry.ramsey@xxxxxxx>
> ---
>  xen/arch/arm/Kconfig                     |  5 +++++
>  xen/arch/arm/include/asm/arm64/sysregs.h | 12 ++++++++++++
>  2 files changed, 17 insertions(+)
> 
> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
> index cf6af68299..a5c111e08e 100644
> --- a/xen/arch/arm/Kconfig
> +++ b/xen/arch/arm/Kconfig
> @@ -91,6 +91,7 @@ config MMU
>  
>  config MPU
>       bool "MPU" if UNSUPPORTED
> +     select ARM_SECURE_STATE if ARM_64
>       select STATIC_MEMORY
>       help
>         Memory Protection Unit (MPU). Select if you plan to run Xen on ARMv8-R
> @@ -223,6 +224,10 @@ config HARDEN_BRANCH_PREDICTOR
>  
>         If unsure, say Y.
>  
> +config ARM_SECURE_STATE
> +     bool "Xen will run in Arm Secure State"
> +     default n
No need, n is a default. I don't think this should be a selectable option.

> +
>  config ARM64_PTR_AUTH
>       def_bool n
>       depends on ARM_64
> diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h 
> b/xen/arch/arm/include/asm/arm64/sysregs.h
> index 7440d495e4..29caad7155 100644
> --- a/xen/arch/arm/include/asm/arm64/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm64/sysregs.h
> @@ -462,6 +462,18 @@
>  #define ZCR_ELx_LEN_SIZE             9
>  #define ZCR_ELx_LEN_MASK             0x1ff
>  
> +#ifdef CONFIG_ARM_SECURE_STATE
> +/*
> + * The Armv8-R AArch64 architecture always executes code in Secure
> + * state with EL2 as the highest Exception.
s/Exception/exception level/

> + *
> + * Hypervisor timer registers for Secure EL2.
> + */
> +#define CNTHP_TVAL_EL2  CNTHPS_TVAL_EL2
TVAL is not used in Xen, so you can drop it

> +#define CNTHP_CTL_EL2   CNTHPS_CTL_EL2
> +#define CNTHP_CVAL_EL2  CNTHPS_CVAL_EL2
EL1 will still use the NS EL1 timer (CNTP)?

> +#endif
> +
>  #define REGION_TEXT_PRBAR       0x38    /* SH=11 AP=10 XN=00 */
>  #define REGION_RO_PRBAR         0x3A    /* SH=11 AP=10 XN=10 */
>  #define REGION_DATA_PRBAR       0x32    /* SH=11 AP=00 XN=10 */

~Michal