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[PATCH 5/5] x86/svm: Merge vmcb.h into svm-types.h



While doing so, make some style fixes to comments/etc.

This removes the include/asm/hvm/svm/ subdirectory.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
---
 xen/arch/x86/include/asm/hvm/svm-types.h | 32 +++++++++++++-
 xen/arch/x86/include/asm/hvm/svm/vmcb.h  | 55 ------------------------
 2 files changed, 31 insertions(+), 56 deletions(-)
 delete mode 100644 xen/arch/x86/include/asm/hvm/svm/vmcb.h

diff --git a/xen/arch/x86/include/asm/hvm/svm-types.h 
b/xen/arch/x86/include/asm/hvm/svm-types.h
index 637b94fa37da..051b235d8f69 100644
--- a/xen/arch/x86/include/asm/hvm/svm-types.h
+++ b/xen/arch/x86/include/asm/hvm/svm-types.h
@@ -7,7 +7,37 @@
 
 #include <xen/types.h>
 
-#include <asm/hvm/svm/vmcb.h>
+struct svm_domain {
+    union {
+        uint64_t raw[2];
+        struct {
+            uint64_t length;
+            uint64_t status;
+        };
+    } osvw;
+};
+
+struct svm_vcpu {
+    struct vmcb_struct *vmcb;
+    unsigned long *msrpm;
+    uint64_t vmcb_pa;
+    int     launch_core;
+
+    uint8_t vmcb_sync_state; /* enum vmcb_sync_state */
+
+    /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */
+    uint8_t cached_insn_len; /* Zero if no cached instruction. */
+
+    /*
+     * Upper four bytes are undefined in the VMCB, therefore we can't use the
+     * fields in the VMCB. Write a 64bit value and then read a 64bit value is
+     * fine unless there's a VMRUN/VMEXIT in between which clears the upper
+     * four bytes.
+     */
+    uint64_t guest_sysenter_cs;
+    uint64_t guest_sysenter_esp;
+    uint64_t guest_sysenter_eip;
+};
 
 struct nestedsvm {
     uint64_t ns_msr_hsavepa; /* MSR HSAVE_PA value */
diff --git a/xen/arch/x86/include/asm/hvm/svm/vmcb.h 
b/xen/arch/x86/include/asm/hvm/svm/vmcb.h
deleted file mode 100644
index d1e200df564c..000000000000
--- a/xen/arch/x86/include/asm/hvm/svm/vmcb.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * vmcb.h: VMCB related definitions
- * Copyright (c) 2005-2007, Advanced Micro Devices, Inc
- * Copyright (c) 2004, Intel Corporation.
- *
- */
-#ifndef __ASM_X86_HVM_SVM_VMCB_H__
-#define __ASM_X86_HVM_SVM_VMCB_H__
-
-#include <xen/types.h>
-
-struct svm_domain {
-    /* OSVW MSRs */
-    union {
-        uint64_t raw[2];
-        struct {
-            uint64_t length;
-            uint64_t status;
-        };
-    } osvw;
-};
-
-struct svm_vcpu {
-    struct vmcb_struct *vmcb;
-    u64    vmcb_pa;
-    unsigned long *msrpm;
-    int    launch_core;
-
-    uint8_t vmcb_sync_state; /* enum vmcb_sync_state */
-
-    /* VMCB has a cached instruction from #PF/#NPF Decode Assist? */
-    uint8_t cached_insn_len; /* Zero if no cached instruction. */
-
-    /* Upper four bytes are undefined in the VMCB, therefore we can't
-     * use the fields in the VMCB. Write a 64bit value and then read a 64bit
-     * value is fine unless there's a VMRUN/VMEXIT in between which clears
-     * the upper four bytes.
-     */
-    uint64_t guest_sysenter_cs;
-    uint64_t guest_sysenter_esp;
-    uint64_t guest_sysenter_eip;
-};
-
-#endif /* ASM_X86_HVM_SVM_VMCS_H__ */
-
-/*
- * Local variables:
- * mode: C
- * c-file-style: "BSD"
- * c-basic-offset: 4
- * tab-width: 4
- * indent-tabs-mode: nil
- * End:
- */
-- 
2.39.5




 


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