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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v3 09/14] xen/riscv: aplic_init() implementation
On 5/22/25 5:26 PM, Jan Beulich wrote:
On 21.05.2025 18:03, Oleksii Kurochko wrote: --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -9,19 +9,113 @@ * Copyright (c) 2024-2025 Vates */ +#include <xen/device_tree.h> #include <xen/errno.h> #include <xen/init.h> #include <xen/irq.h> +#include <xen/mm.h> #include <xen/sections.h> #include <xen/types.h> +#include <xen/vmap.h> + +#include "aplic-priv.h" #include <asm/device.h> +#include <asm/imsic.h> #include <asm/intc.h> +#include <asm/riscv_encoding.h> + +#define APLIC_DEFAULT_PRIORITY 1 + +/* The maximum number of wired interrupt sources supported by APLIC domain. */ +#define APLIC_MAX_NUM_WIRED_IRQ_SOURCES 1023Wait - what's "wired" here? There's only MSI you said elsewhere? This what was mentioned in DT binding:
riscv,num-sources:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 1023
description:
Specifies the number of wired interrupt sources supported by this
APLIC domain.
But 'wired' isn't really mention in AIA spec:
For each possible interrupt source , register sourcecfg[ ] controls the source
mode for source in this interrupt domain as well as any delegation of the source
to a child domain.
So IMO it isn't connected to wired or not interrupts. So ...
Further - how's this 1023 related to any of the other uses of that number? Is this by chance ARRAY_SIZE(aplic.regs->sourcecfg)? If so, it wants expressing like that, to allow making the connection. ... ARRAY_SIZE(aplic.regs->sourcecfg) perfectly match and will be used instead
of APLIC_MAX_NUM_WIRED_IRQ_SOURCES.
Is it actually necessary to panic() in this case? Can't you just lower .num_irqs instead (rendering higher IRQs,if any, non-functional)? Good point. I think we can just use aplic_info.num_irqs = ARRAY_SIZE(aplic.regs->sourcecfg);
Good question. According to AIA spec: 4.5. Memory-mapped control region for an interrupt domain For each interrupt domain that an APLIC supports, there is a dedicated memory-mapped control region for managing interrupts in that domain. This control region is a multiple of 4 KiB in size and aligned to a 4-KiB address boundary. The smallest valid control region is 16 KiB. An interrupt domain’s control region is populated by a set of 32-bit registers. The first 16 KiB contains the registers listed in Table 6 The best what I can do is:
1. Check that the size is a multiple of 4KiB is size and is not less then 16Kib. But nothing I can do with
the high boundary.
2. Regarding paddr the best I can do it is to check that it is a 4-KiB aligned.
I added the following:
if ( !IS_ALIGNED(paddr, KB(4)) )
panic("%s: paddr of memory-mapped control region should be 4Kb "
"aligned:%#lx\n", __func__, paddr);
if ( !IS_ALIGNED(size, KB(4)) && (size < KB(16)) )
panic("%s: memory-mapped control region should be a multiple of 4 KiB "
"in size and the smallest valid control is 16Kb: %#lx\n",
__func__, size);
Would it be enough?
It could be const. I added __ro_after_init when I misinterpreted a correct usage of it. I will return back const instead of __ro_after_init. --- /dev/null +++ b/xen/arch/riscv/include/asm/aplic.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: MIT */ + +/* + * xen/arch/riscv/asm/include/aplic.h + * + * RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + */ + +#ifndef ASM__RISCV__APLIC_H +#define ASM__RISCV__APLIC_HWants updating again.+#include <xen/types.h> + +#include <asm/imsic.h> + +#define APLIC_DOMAINCFG_IE BIT(8, UL) +#define APLIC_DOMAINCFG_DM BIT(2, UL)Why UL when ... Agree, BIT(x,U) would be more correct. Thanks. ~ Oleksii
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