[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v9 7/8] xen/arm: enable dom0 to use PCI devices with pci-passthrough=no
Hi, On 28/04/2025 13:31, Mykyta Poturai wrote: On 28.04.25 11:54, Julien Grall wrote:Hi Mykyta, On 14/03/2025 13:34, Mykyta Poturai wrote:From: Stewart Hildebrand <stewart.hildebrand@xxxxxxx> Enable the use of IOMMU + PCI in dom0 without having to specify "pci-passthrough=yes". We rely on dom0 to initialize the PCI controller and perform a PHYSDEVOP_pci_device_add call to add each device to SMMU.It would be good to explain why Xen cannot initialize the PCI controller. Asking, because the reason is the PCI controller is too complex, then you will likely need the same approach for PCI passthrough...I think the main reason for this is complexity and the possibility of additional dependencies: there could be external clocks or reset pins that the PCI host depends on for working correctly. I will add this to the commit message. Regarding PCI passthrough, it is already using the same approach (at least on Arm). There are patches for enabling Xen on Arm to perform bus enumeration by itself by Luca Fancellu, but I haven't yet got to test them in a meaningful way. Can you provide a link to the series? I would like to make sure we have a coherent approach. In particular, it is not clear to me how Dom0 and Xen will be able to coordinate the access to the PCI controller. Are we going to have a mediator? Enable pci_init() for initializing Xen's internal PCI subsystem, and allow PHYSDEVOP_pci_device_add when pci-passthrough is disabled.Effectively, wouldn't this mean dom0 always *have* to call PHYSDEVOP_pci_device_add? Otherwise, how would dom0 know whether it needs to call PHSYDEVOP_pci_device_add? Cheers,Yes, I can't say for every system but with PCI host behind SMMU the PHYSDEVOP_pci_device_add call is required to use DMA. Dom0 will not be able to know whether a device is protected by an IOMMU. So I guess it means the OS will need to be able to cope with an error (like on x86). Cheers, -- Julien Grall
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