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Re: UBSan bug in real mode fpu emulation
- To: Fabian Specht <f.specht@xxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Fri, 25 Apr 2025 11:23:58 +0200
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- Cc: manuel.andreas@xxxxxx, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Fri, 25 Apr 2025 09:24:03 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 24.04.2025 12:05, Fabian Specht wrote:
> On Thu, Apr 24, 2025 at 08:34:42AM +0200, Jan Beulich wrote:
>> Since ...
>>
>>> Similar code resides in the same file in lines 87, 125 and 127.
>>
>> ... all of these are shifts by 16, could you clarify what it is that you
>> want to shift by 4? Imo what we need to do here is add casts to unsigned
>> int, for the results thereof to be shifted (or use some extra arithmetic
>> to achieve the same effect, e.g. add in 0U). Or we could go and replace
>> the shifts by 16 with shifts by 12 (accounting for the later right shift
>> by 4, which would then need dropping).
>
> I will submit a patch in the coming hours.
Since in another reply you said "yes" to the cast suggestion, I'd like to
point out that I was meaning to try the other route first. But that's not
going to be today.
Jan
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