[PATCH] x86/PVH: expose OEMx ACPI tables to Dom0

[Jan Beulich <jbeulich@xxxxxxxx>]

What they contain we don't know, but we can't sensibly hide them. On my
Skylake system OEM1 (with a description of "INTEL  CPU EIST") is what
contains all the _PCT, _PPC, and _PSS methods, i.e. about everything
needed for cpufreq. (_PSD interestingly are in an SSDT there.)

Further OEM2 there has a description of "INTEL  CPU  HWP", while OEM4
has "INTEL  CPU  CST". Pretty clearly all three need exposing for
cpufreq and cpuidle to work.

Fixes: 8b1a5268daf0 ("pvh/dom0: whitelist PVH Dom0 ACPI tables")
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
Sadly the commit above says nothing at all about the criteria used by
which tables would want to be whitelisted. Further tables on said system
which weren't blacklisted prior to that commit, yet which also aren't
whitelisted are DBGP, DBG2, FIDT, LPIT, MIGT, MSCT, NITR, PCCT, RASF,
SVOS, UEFI, WDDT, and WSMT. Even without diving into the details of any
of them it seems pretty clear to me that at least some would want
whitelisting, too.

--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -1010,12 +1010,20 @@ static bool __init pvh_acpi_table_allowe
             return true;
         else
         {
+    skip:
             printk("Skipping table %.4s in non-ACPI non-reserved region\n",
                    sig);
             return false;
         }
     }
 
+    if ( !strncmp(sig, "OEM", 3) )
+    {
+        if ( acpi_memory_banned(address, size) )
+            goto skip;
+        return true;
+    }
+
     return false;
 }