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Re: [PATCH 5/8] x86/domctl: Stop using XLAT_cpu_user_regs()


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Date: Fri, 21 Mar 2025 16:01:45 +0000
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  • Cc: Roger Pau Monné <roger.pau@xxxxxxxxxx>, Xen-devel <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Fri, 21 Mar 2025 16:01:52 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 17/03/2025 11:38 am, Jan Beulich wrote:
> On 11.03.2025 22:10, Andrew Cooper wrote:
>> In order to support FRED, we're going to have to remove the {ds..gs} fields
>> from struct cpu_user_regs, meaning that it is going to have to become a
>> different type to the structure embedded in vcpu_guest_context_u.
>>
>> In both arch_{get,set}_info_guest(), expand the memcpy()/XLAT_cpu_user_regs()
>> to copy the fields individually.  This will allow us to eventually make them
>> different types.
>>
>> No practical change.  The compat cases are identical, while the non-compat
>> cases no longer copy _pad fields.
> That's fine for "set", but potentially not for "get": Someone simply doing
> memcmp() on two pieces of output might then break.

It's not a fastpath, and I'm not looking to not break things, but I was
expecting it to be safe.

The pad fields for cs (inc saved_upcall_mask) and ss get lost on the
first exit-from-guest, and the pad fields for the data segment get lost
on the first schedule.

So while there is a change here, I don't think it's anything that
current code could plausibly be relying on.

Furthermore, when we get rid of the vm86 fields, we don't even store the
pad fields anywhere in Xen, so they're going, one way or another, by the
end of the series.

Finally, disaggregation or not, this is an unstable interface so we do
have some wiggle room.

I guess I should discuss this more in the commit message?

>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
>> ---
>> CC: Jan Beulich <JBeulich@xxxxxxxx>
>> CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
>>
>> Should we really be copying error_code/entry_vector?  They're already listed
>> as explicitly private fields, and I don't think anything good can come of
>> providing/consuming them.
> I don't see a reason why we'd need to copy them in arch_set_info_guest();
> arch_set_info_hvm_guest() doesn't copy them either. For
> arch_get_info_guest() it's less clear - toolstack components may have
> grown a dependency on them (e.g. introspection?), so I'd err on the side
> of retaining prior behavior. (Of course there's then the corner case of
> someone calling "get" right after "set", expecting the two fields to come
> back unchanged.)

Introspection doesn't use this interface.  Regs are sent in the ring,
and don't contain these fields either.

Also, for HVM guests, we set the vmexit rsp to &error_code so we only
push the GPRs, without the IRET frame above it.

These fields, (inc saved_upcall_mask) have different behaviours under
FRED.  I don't think we can get away without them changing, and for
these at least, they were clearly marked as internal.

>
>> @@ -1204,7 +1223,26 @@ int arch_set_info_guest(
>>  #ifdef CONFIG_COMPAT
>>      else
>>      {
>> -        XLAT_cpu_user_regs(&v->arch.user_regs, &c.cmp->user_regs);
>> +        v->arch.user_regs.ebx               = c.cmp->user_regs.ebx;
>> +        v->arch.user_regs.ecx               = c.cmp->user_regs.ecx;
>> +        v->arch.user_regs.edx               = c.cmp->user_regs.edx;
>> +        v->arch.user_regs.esi               = c.cmp->user_regs.esi;
>> +        v->arch.user_regs.edi               = c.cmp->user_regs.edi;
>> +        v->arch.user_regs.ebp               = c.cmp->user_regs.ebp;
>> +        v->arch.user_regs.eax               = c.cmp->user_regs.eax;
>> +        v->arch.user_regs.error_code        = c.cmp->user_regs.error_code;
>> +        v->arch.user_regs.entry_vector      = c.cmp->user_regs.entry_vector;
>> +        v->arch.user_regs.eip               = c.cmp->user_regs.eip;
>> +        v->arch.user_regs.cs                = c.cmp->user_regs.cs;
>> +        v->arch.user_regs.saved_upcall_mask = 
>> c.cmp->user_regs.saved_upcall_mask;
>> +        v->arch.user_regs.eflags            = c.cmp->user_regs.eflags;
>> +        v->arch.user_regs.esp               = c.cmp->user_regs.esp;
>> +        v->arch.user_regs.ss                = c.cmp->user_regs.ss;
>> +        v->arch.user_regs.es                = c.cmp->user_regs.es;
>> +        v->arch.user_regs.ds                = c.cmp->user_regs.ds;
>> +        v->arch.user_regs.fs                = c.cmp->user_regs.fs;
>> +        v->arch.user_regs.gs                = c.cmp->user_regs.gs;
> Just to mention it (there's no change in behavior here afaict): Us writing
> only half of the register fields looks like a latent (but perhaps only
> theoretical) problem to me. A dis-aggregated toolstack may set 64-bit PV
> context, then toggle address size, then set 32-bit context. That'll leave
> the high halves of respective fields non-zero. I didn't check whether any
> badness could result from that, as for the time being
> XEN_DOMCTL_set_address_size isn't marked dis-aggregation-safe, and hence
> this at least isn't of immediate concern.

Hmm, gnarly.  The naive way to do 64-bit set, toggle, 32-bit set doesn't
work, because set of either bitness involves:

    cr3_page = get_page_from_mfn(cr3_mfn, d);

while toggle requires no memory in the domain, owing to the different
typeref rules.

But, because the hypercall isn't atomic, you can make a 64-bit set which
intentionally fails later (e.g. bad vm_assist setting), at which point
the switch will work too.

Breaking the switch vs no-memory limitation has been on my wishlist
(probably never going to happen), to break the a-priori dependency which
prevents pvgrub64 from booting a 32bit guest, which in turn is the major
reason why pygrub is still the incumbent.

Stale high bits will be lost when we schedule the vCPU, because of how
RESTORE_ALL currently works, although I still intend to switch to plain
pop's because that is a fastpath.


Either way, I think it would be prudent to zero v->arch.user_regs in a
prep patch and backport that.

~Andrew



 


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