Re: [PATCH] RISCV/bitops: Use Zbb to provide arch-optimised bitops

[Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>]

On 3/6/25 9:19 PM, Andrew Cooper wrote:

> On 05/03/2025 7:34 am, Jan Beulich wrote:
> > On 28.02.2025 17:24, Andrew Cooper wrote:
> > > On 27/02/2025 8:11 am, Jan Beulich wrote:
> > > > On 26.02.2025 18:20, Andrew Cooper wrote:
> > > > > --- a/xen/arch/riscv/include/asm/bitops.h
> > > > > +++ b/xen/arch/riscv/include/asm/bitops.h
> > > > > @@ -125,6 +125,13 @@ static inline void clear_bit(int nr, volatile void *p)
> > > > >  #undef NOT
> > > > >  #undef __AMO
> > > > >  
> > > > > +#define arch_ffs(x)     ((x) ? 1 + __builtin_ctz(x) : 0)
> > > > > +#define arch_ffsl(x)    ((x) ? 1 + __builtin_ctzl(x) : 0)
> > > > > +#define arch_fls(x)     ((x) ? 32 - __builtin_clz(x) : 0)
> > > > >             
> > > > I fear you won't like me to say this, but can't we avoid baking in yet
> > > > another assumption on sizeof(int) == 4, by using at least sizeof(int) * 8
> > > > here (yet better might be sizeof(int) * BITS_PER_BYTE)?
> > > >           
> > > Yes and no.
> > >
> > > No, because 32 here is consistent with ARM and PPC when it comes to
> > > arch_fls().  Given the effort it took to get these consistent, I'm not
> > > interested in letting them diverge.
> > >
> > > But, if someone wants to introduce BITS_PER_INT to mirror BITS_PER_LONG
> > > and use it consistently, then that would be ok too.
> > >         
> >       
> Oleksii: I see your patch is committed, but when I said "use it
> consistently", I meant "patch ARM and PPC too".
>     
I planned to do that in a separate patch next week.

> > I was actually hoping to eliminate BITS_PER_LONG at some point, in favor
> > of using sizeof(long) * BITS_PER_BYTE. (Surely in common code we could
> > retain a shorthand of that name, if so desired, but I see no reason why
> > each arch would need to provide all three BITS_PER_{BYTE,INT,LONG}.)
> >       
> The concern is legibility and clarity.
>
> This:
>
>     ((x) ? 32 - __builtin_clz(x) : 0)
>
> is a clear _expression_ in a way that this:
>
>     ((x) ? (sizeof(int) * BITS_PER_BYTE) - __builtin_clz(x) : 0)
>
> is not.  The problem is the extra binary _expression_, and this:
>
>     ((x) ? BITS_PER_INT - __builtin_clz(x) : 0)
>
> is still clear, because the reader doesn't have to perform a multiply to
> just to figure out what's going on.
>
>
> It is definitely stupid to have each architecture provide their own
> BITS_PER_*.  The compiler is in a superior position to provide those
> details, and it should be in a common location.
>
> I don't particularly mind how those constants are derived, but one key
> thing that BITS_PER_* can do which sizeof() can't is be used in #ifdef/etc.
>     
What about moving them to xen/config.h? (if it isn't the best one place, any suggestion which is better?)
#define BYTES_PER_INT  (1 << INT_BYTEORDER)
#define BITS_PER_INT  (BYTES_PER_INT << 3)
#define BYTES_PER_LONG (1 << LONG_BYTEORDER)
#define BITS_PER_LONG (BYTES_PER_LONG << 3)
#define BITS_PER_BYTE 8
Also, it seems like the follwoing could be moved there too:

#define POINTER_ALIGN  BYTES_PER_LONG
#define BITS_PER_LLONG 64

#define BITS_PER_BYTE 8

Only, BITS_PER_XEN_ULONG is looking different for x86, so should be still in arch specific config.h.

~ Oleksii
> The following files use BITS_PER_LONG preprocessing:
>
> arch/arm/include/asm/div64.h
> arch/x86/cpu/mcheck/mce.c
> arch/x86/smpboot.c
> common/bitops.c
> common/coverage/gcov.h
> common/coverage/llvm.c
> common/cpu.c
> common/event_channel.c
> common/time.c
> common/ubsan/ubsan.c
> include/asm-generic/div64.h
> include/xen/cpumask.h
> include/xen/inttypes.h
> include/xen/nodemask.h
> include/xen/sched.h
> include/xen/xxhash.h
> lib/find-next-bit.c
> lib/generic-ffsl.c
> lib/generic-flsl.c
> lib/generic-hweightl.c
>
> And I really don't think they can be replaced with a sizeof().
>
> ~Andrew
>