[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH v4 04/11] VMX: convert vmx_pin_based_exec_control
... to a field in the capability/controls struct. Use an instance of that struct also in vmx_init_vmcs_config(). Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> --- v4: Re-base. v3: Add initializer to vmx_init_vmcs_config() new local var. v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -u32 vmx_pin_based_exec_control __read_mostly; u32 vmx_cpu_based_exec_control __read_mostly; u32 vmx_secondary_exec_control __read_mostly; uint64_t vmx_tertiary_exec_control __read_mostly; @@ -263,7 +262,7 @@ static bool cap_check( static int vmx_init_vmcs_config(bool bsp) { u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt; - u32 _vmx_pin_based_exec_control; + struct vmx_caps caps = {}; u32 _vmx_cpu_based_exec_control; u32 _vmx_secondary_exec_control = 0; uint64_t _vmx_tertiary_exec_control = 0; @@ -280,7 +279,7 @@ static int vmx_init_vmcs_config(bool bsp PIN_BASED_NMI_EXITING); opt = (PIN_BASED_VIRTUAL_NMIS | PIN_BASED_POSTED_INTERRUPT); - _vmx_pin_based_exec_control = adjust_vmx_controls( + caps.pin_based_exec_control = adjust_vmx_controls( "Pin-Based Exec Control", min, opt, MSR_IA32_VMX_PINBASED_CTLS, &mismatch); @@ -443,7 +442,7 @@ static int vmx_init_vmcs_config(bool bsp if ( (_vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) && ple_gap == 0 ) { - if ( !vmx_pin_based_exec_control ) + if ( !vmx_caps.pin_based_exec_control ) printk(XENLOG_INFO "Disable Pause-Loop Exiting.\n"); _vmx_secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING; } @@ -461,10 +460,10 @@ static int vmx_init_vmcs_config(bool bsp * is a minimal requirement, only check the former, which is optional. */ if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) ) - _vmx_pin_based_exec_control &= ~PIN_BASED_POSTED_INTERRUPT; + caps.pin_based_exec_control &= ~PIN_BASED_POSTED_INTERRUPT; if ( iommu_intpost && - !(_vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) + !(caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) { printk("Intel VT-d Posted Interrupt is disabled for CPU-side Posted " "Interrupt is not enabled\n"); @@ -498,10 +497,10 @@ static int vmx_init_vmcs_config(bool bsp if ( mismatch ) return -EINVAL; - if ( !vmx_pin_based_exec_control ) + if ( !vmx_caps.pin_based_exec_control ) { /* First time through. */ - vmx_pin_based_exec_control = _vmx_pin_based_exec_control; + vmx_caps = caps; vmx_cpu_based_exec_control = _vmx_cpu_based_exec_control; vmx_secondary_exec_control = _vmx_secondary_exec_control; vmx_tertiary_exec_control = _vmx_tertiary_exec_control; @@ -532,7 +531,7 @@ static int vmx_init_vmcs_config(bool bsp vmcs_revision_id, vmx_basic_msr_low & VMX_BASIC_REVISION_MASK); mismatch |= cap_check( "Pin-Based Exec Control", - vmx_pin_based_exec_control, _vmx_pin_based_exec_control); + vmx_caps.pin_based_exec_control, caps.pin_based_exec_control); mismatch |= cap_check( "CPU-Based Exec Control", vmx_cpu_based_exec_control, _vmx_cpu_based_exec_control); @@ -1113,7 +1112,7 @@ static int construct_vmcs(struct vcpu *v vmx_vmcs_enter(v); /* VMCS controls. */ - __vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_pin_based_exec_control); + __vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_caps.pin_based_exec_control); v->arch.hvm.vmx.exec_control = vmx_cpu_based_exec_control; if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling ) @@ -2150,7 +2149,7 @@ void vmcs_dump_vcpu(struct vcpu *v) printk("TSC Offset = 0x%016lx TSC Multiplier = 0x%016lx\n", vmr(TSC_OFFSET), vmr(TSC_MULTIPLIER)); if ( (v->arch.hvm.vmx.exec_control & CPU_BASED_TPR_SHADOW) || - (vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) + (vmx_caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) printk("TPR Threshold = 0x%02x PostedIntrVec = 0x%02x\n", vmr32(TPR_THRESHOLD), vmr16(POSTED_INTR_NOTIFICATION_VECTOR)); if ( (v->arch.hvm.vmx.secondary_exec_control & @@ -2229,7 +2228,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_pin_based_exec_control = 0; vmx_cpu_based_exec_control = 0; vmx_secondary_exec_control = 0; vmx_tertiary_exec_control = 0; --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1057,7 +1057,7 @@ static void load_shadow_control(struct v * and EXCEPTION * Enforce the removed features */ - nvmx_update_pin_control(v, vmx_pin_based_exec_control); + nvmx_update_pin_control(v, vmx_caps.pin_based_exec_control); vmx_update_cpu_exec_control(v); vmx_update_secondary_exec_control(v); nvmx_update_exit_control(v, vmx_vmexit_control); --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -217,7 +217,6 @@ extern u32 vmx_cpu_based_exec_control; #define PIN_BASED_VIRTUAL_NMIS 0x00000020 #define PIN_BASED_PREEMPT_TIMER 0x00000040 #define PIN_BASED_POSTED_INTERRUPT 0x00000080 -extern u32 vmx_pin_based_exec_control; #define VM_EXIT_SAVE_DEBUG_CNTRLS 0x00000004 #define VM_EXIT_IA32E_MODE 0x00000200 @@ -303,6 +302,7 @@ extern u64 vmx_ept_vpid_cap; /* Capabilities and dynamic (run-time adjusted) execution control flags. */ struct vmx_caps { uint64_t basic_msr; + uint32_t pin_based_exec_control; }; extern struct vmx_caps vmx_caps; @@ -317,7 +317,7 @@ extern struct vmx_caps vmx_caps; vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) #define cpu_has_vmx_vnmi \ (IS_ENABLED(CONFIG_INTEL_VMX) && \ - vmx_pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS) + (vmx_caps.pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS)) #define cpu_has_vmx_msr_bitmap \ (IS_ENABLED(CONFIG_INTEL_VMX) && \ vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP) @@ -371,7 +371,7 @@ extern struct vmx_caps vmx_caps; vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) #define cpu_has_vmx_posted_intr_processing \ (IS_ENABLED(CONFIG_INTEL_VMX) && \ - vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) + (vmx_caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT)) #define cpu_has_vmx_vmcs_shadowing \ (IS_ENABLED(CONFIG_INTEL_VMX) && \ vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING)
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