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Re: [PATCH v3] xen/riscv: identify specific ISA supported by cpu


  • To: Oleksii Kurochko <oleksii.kurochko@xxxxxxxxx>
  • From: Jan Beulich <jbeulich@xxxxxxxx>
  • Date: Mon, 3 Feb 2025 17:31:09 +0100
  • Autocrypt: addr=jbeulich@xxxxxxxx; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL
  • Cc: Alistair Francis <alistair.francis@xxxxxxx>, Bob Eshleman <bobbyeshleman@xxxxxxxxx>, Connor Davis <connojdavis@xxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Julien Grall <julien@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • Delivery-date: Mon, 03 Feb 2025 16:31:24 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On 03.02.2025 17:24, Oleksii Kurochko wrote:
> On 2/3/25 5:03 PM, Jan Beulich wrote:
>> On 03.02.2025 16:05, Oleksii Kurochko wrote:
>>> On 1/27/25 3:47 PM, Jan Beulich wrote:
>>>>> +static bool is_lowercase_extension_name(const char *str)
>>>>> +{
>>>>> +    /*
>>>>> +     * `str` could contain full riscv,isa string from device tree so one
>>>>> +     * of the stop condionitions is checking for '_' as extensions are
>>>>> +     * separated by '_'.
>>>>> +     */
>>>>> +    for ( unsigned int i = 0; (str[i] != '\0') && (str[i] != '_'); i++ )
>>>>> +        if ( !islower(str[i]) )
>>>>> +            return false;
>>>>> +
>>>>> +    return true;
>>>>> +}
>>>>> +
>>>>> +static void __init match_isa_ext(const char *name, const char *name_end,
>>>>> +                                 unsigned long *bitmap)
>>>>> +{
>>>>> +    const size_t riscv_isa_ext_count = ARRAY_SIZE(riscv_isa_ext);
>>>>> +
>>>>> +    for ( unsigned int i = 0; i < riscv_isa_ext_count; i++ )
>>>>> +    {
>>>>> +        const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i];
>>>>> +
>>>>> +        /*
>>>>> +         * `name` (according to device tree binding) and
>>>>> +         * `ext->name` (according to initialization of riscv_isa_ext[]
>>>>> +         * elements) must be all in lowercase.
>>>>> +         *
>>>>> +         * Just to be sure that it is true, ASSERT() is added.
>>>>> +         */
>>>>> +        ASSERT(is_lowercase_extension_name(name) &&
>>>>> +               is_lowercase_extension_name(ext->name));
>>>> More general remark: While asserting on ext->name is okay, for it being
>>>> our own data, asserting on data coming from the outside is generally not
>>>> correct. For now I'm not going to insist on this being changed, but
>>>> sooner or later it will want revisiting
>>> IIUC it would be better to leave 
>>> ASSERT(is_lowercase_extension_name(ext->name)) in match_isa_ext()
>>> and put ASSERT(is_lowercase_extension_name(ext) in riscv_isa_parse_string() 
>>> before match_isa_ext()
>>> is called:
>>>     static int __init riscv_isa_parse_string(const char *isa,
>>>                                              unsigned long *out_bitmap)
>>>     {
>>>       ...
>>>       while ( *isa )
>>>       {
>>>         const char *ext = isa++;
>>>       ...
>>>       ASSERT(is_lowercase_extension_name(ext));
>>>       match_isa_ext(ext, ext_end, out_bitmap);
>>>     }
>>>
>>> Is my understanding correct?
>> That depends on the origin of the incoming "isa". Considering the function
>> wants to parse it, I'd expect it still comes from DT. In which case
>> asserting on it is wrong; anything may come from there, and nothing should
>> cause assertion failures. Recall that assertions are checks of _our own
>> internal state_ only.
> 
> But based on the device tree binding 
> (https://elixir.bootlin.com/linux/v6.13.1/source/Documentation/devicetree/bindings/riscv/extensions.yaml#L47
>  
> <https://elixir.bootlin.com/linux/v6.13.1/source/Documentation/devicetree/bindings/riscv/extensions.yaml#L47>
>  ),
> not anything should come from DT for the riscv,isa string; only lowercase 
> letters are allowed.
> I am not sure if it makes sense to double-check if riscv,isa is correct, as 
> my expectation (which I haven’t checked yet) is that the DTS will
> be validated during compilation.
> 
> Does it make sense to double check what was put in DT's riscv,isa?

I think so. Just not by way of an assertion.

Jan



 


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