[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[PATCH v4 3/6] xen/arm: platforms: Add NXP S32G3 Processors config


  • To: xen-devel@xxxxxxxxxxxxxxxxxxxx
  • From: "Andrei Cherechesu (OSS)" <andrei.cherechesu@xxxxxxxxxxx>
  • Date: Thu, 19 Dec 2024 13:23:12 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=1/W+hjvEQAfrqy6fE9YS8QKciaTcdeloCtPRibShYIg=; b=oIhCr1MjOVLE8ZLKBg+WbH/CfOvO9aUkYwY2URLduJG0V6O1D+Abkp9LD1AHtpHkNGJK5QD4l5iBufAA8GJ2QxB95ckA1ja4EUuv7OmC2AtBB9TfAq3hPzfc1FAAfoKuILZOPuQNWxxYVdeIOoUAuy7MwjfJnUrHJErcnAEDBAFviwS6VJHHJlMpewaOQMGjEifveJiI02Czmexhrr9/o21moYwL8xdnD+fY7YoJGeykq21U5PIdH/jucoTfjx+IDoYQa1M4Z27gV1GLBd4OsLhTzhyTQQPVnHDxHVIB16PGdHZxKAxPPd+fH+Bsb/M3Q5LVoXpefUPsSpl24g/mLg==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=urH1RkzBUk+6oYu9Sp+9O7VS9INPRNMrPcWOH4cUSzBbQnO2ece4LYHe9RKx/KXFvAqrd+Cgj1IXM/FieR2ixAZpG8dQ6x3eSO1D17Z1ZQpctkKQhUsUAc1byBiDPlruuYiYZAEVcYYJD4cMaHmUDs4FotlncNKmoAVg4B+DypqCVB730O+ciH9eUaRQgbyn5NO4nGssP79W0eBRckLagnKV+izhoX9np7zoLOxgnNKP+PhBW+SlimFVOP7h8NYXc2bxk7HaKirfY/YD+b7i/PRbnHH+rmJOZ4LZDF3NOwEdyTPBcJHsDRC1rnbSRsAEJezlADiuvFI27vNEn7OKHA==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com;
  • Cc: S32@xxxxxxx, andrei.cherechesu@xxxxxxxxxxx, Andrei Cherechesu <andrei.cherechesu@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Thu, 19 Dec 2024 11:23:47 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

From: Andrei Cherechesu <andrei.cherechesu@xxxxxxx>

Platforms based on NXP S32G3 processors use the NXP LINFlexD
UART driver for console by default, and rely on Dom0 having
access to SCMI services for system-level resources from
firmware at EL3.

Signed-off-by: Andrei Cherechesu <andrei.cherechesu@xxxxxxx>
Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
---
 xen/arch/arm/platforms/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/xen/arch/arm/platforms/Kconfig b/xen/arch/arm/platforms/Kconfig
index 02322c259c..6dbf6ec87b 100644
--- a/xen/arch/arm/platforms/Kconfig
+++ b/xen/arch/arm/platforms/Kconfig
@@ -37,6 +37,14 @@ config MPSOC
        help
        Enable all the required drivers for Xilinx Ultrascale+ MPSoC
 
+config S32G3
+       bool "NXP S32G3 Processors support"
+       depends on ARM_64
+       select HAS_LINFLEX
+       select SCMI_SMC
+       help
+       Enable all the required drivers for NXP S32G3 Processors Family
+
 config NO_PLAT
        bool "No Platforms"
        help
-- 
2.45.2




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.