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Re: [PATCH v2] docs: fusa: Add dom0less domain configuration requirements
- To: Michal Orzel <michal.orzel@xxxxxxx>
- From: Bertrand Marquis <Bertrand.Marquis@xxxxxxx>
- Date: Wed, 18 Dec 2024 14:00:12 +0000
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- Cc: Ayan Kumar Halder <ayankuma@xxxxxxx>, Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Artem Mygaiev <artem_mygaiev@xxxxxxxx>
- Delivery-date: Wed, 18 Dec 2024 14:00:32 +0000
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- Thread-topic: [PATCH v2] docs: fusa: Add dom0less domain configuration requirements
Hi Michal,
> On 18 Dec 2024, at 14:56, Michal Orzel <michal.orzel@xxxxxxx> wrote:
>
>
>
> On 18/12/2024 14:08, Bertrand Marquis wrote:
>>
>>
>> Hi Ayan,
>>
>>> On 18 Dec 2024, at 12:34, Ayan Kumar Halder <ayankuma@xxxxxxx> wrote:
>>>
>>>
>>> On 18/12/2024 08:27, Bertrand Marquis wrote:
>>>> Hi Ayan,
>>> Hi Bertrand,
>>>>
>>>>> On 12 Dec 2024, at 20:03, Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
>>>>> wrote:
>>>>>
>>>>> From: Michal Orzel <michal.orzel@xxxxxxx>
>>>>>
>>>>> Add requirements for dom0less domain creation.
>>>>>
>>>>> Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx>
>>>>> Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
>>>>> ---
> [...]
>
>>>>> +SPIs
>>>>> +----
>>>>> +
>>>>> +`XenSwdgn~spis~1`
>>>>> +
>>>>> +Description:
>>>>> +Xen shall allocate a specified number of shared peripheral interrupts
>>>>> for a
>>>>> +domain.
>>>> This is very ambiguous. What do you mean here ?
>>> Xen shall provide a way to specify the number of shared peripheral
>>> interrupts for a domain via the device tree .
>>
>> I am lost in how you achieve such a thing in the configuration.
>> All you can do is assigned an interrupt to a domain, but the sharing part I
>> do not see what Xen has to do with it.
> This req is about Arm's SPIs (Shared Peripheral Interrupts) and the max
> number you can allocate to a domU.
> You can see more here:
> https://xenbits.xenproject.org/gitweb/?p=xen.git;a=blob;f=docs/misc/arm/device-tree/booting.txt;hb=HEAD#l172
Oh right, no idea how i came to shared interrupts instead of Arm SPIs.
Then this is Arm specific and we need to have a bit more context/clear up here
(as comment or introduction).
And also this should have arm64 somewhere.
Bertrand
>
> ~Michal
|
