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Re: [PATCH v2 1/2] xen/mpu: Map early uart when earlyprintk on
- To: Julien Grall <julien@xxxxxxx>, Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- From: Ayan Kumar Halder <ayankuma@xxxxxxx>
- Date: Tue, 3 Dec 2024 13:34:34 +0000
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- Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Tue, 03 Dec 2024 13:35:00 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 02/12/2024 20:53, Julien Grall wrote:
Hi Ayan,
Hi Julien,
On 27/11/2024 18:39, Ayan Kumar Halder wrote:
CONFIG_EARLY_UART_SIZE is introduced to let user provide physical
size of
early UART. Unlike MMU where we map a page in the virtual address space,
here we need to know the exact physical size to be mapped.
As VA == PA in case of MPU, the memory layout follows exactly the
hardware
configuration. As a consequence, we set EARLY_UART_VIRTUAL_ADDRESS as
physical
address.
EARLY_UART_BASE_ADDRESS and EARLY_UART_SIZE should be aligned to the
minimum
size of MPU region (ie 64 bits) as per the hardware restrictions.
Refer ARM
DDI 0600A.d ID120821 A1.3 "A minimum protection region size of 64
bytes.".
UART is mapped as nGnRE region (as specified by ATTR=100 , refer
G1.3.13,
MAIR_EL2, "---0100 Device memory nGnRE") and Doc ID - 102670_0101_02_en
I can't find the Doc you point online. Do you have a link?
https://developer.arm.com/documentation/102670/0101 - Cortex-R82
processor TRM
Table 4-3, Armv8 architecture memory types (nGnRE - Corresponds to
Device in
Armv7 architecture). Also, it is mapped as outer shareable, RW at EL2
only
I don't quite understand why you mention Armv7 here.
Actually I was quoting from Cortex-R82 TRM.
The code you modify below is 64-bit so Armv8 only.
The code itself LGTM.
Ack.
- Ayan
Cheers,
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