[PATCH 0/4] Virtualize architectural LBRs

[ngoc-tu.dinh@xxxxxxxxxx]

From: Tu Dinh <ngoc-tu.dinh@xxxxxxxxxx>

Intel model-specific last branch records (LBRs) were replaced by
architectural LBRs (see Chapter 20 of Intel SDM volume 3B). This
patchset implements virtual LBRs for HVM guests using Intel's "load
guest IA32_LBR_CTL" and "clear IA32_LBR_CTL" VMX controls.

Add the necessary CPUID and VMX feature checks into Xen. Note that in
this patchset, MSR_IA32_LASTBRANCH_DEPTH is only allowed to be equal to
that of the host's.

Tu Dinh (4):
  x86: Add Intel architectural LBR featureset bits
  x86: Add architectural LBR declarations
  x86: Adjust arch LBR CPU policy
  x86/vmx: Virtualize architectural LBRs

 tools/libs/guest/xg_cpuid_x86.c             |   2 +-
 tools/misc/xen-cpuid.c                      |   3 +
 xen/arch/x86/cpu-policy.c                   |  39 +++
 xen/arch/x86/cpu/common.c                   |   7 +
 xen/arch/x86/hvm/vmx/vmcs.c                 |  11 +-
 xen/arch/x86/hvm/vmx/vmx.c                  | 269 ++++++++++++++------
 xen/arch/x86/include/asm/hvm/vmx/vmcs.h     |   8 +
 xen/arch/x86/include/asm/msr-index.h        |  11 +
 xen/include/public/arch-x86/cpufeatureset.h |  28 +-
 xen/include/xen/lib/x86/cpu-policy.h        |  38 ++-
 xen/lib/x86/cpuid.c                         |   6 +
 11 files changed, 339 insertions(+), 83 deletions(-)

-- 
2.43.0



Ngoc Tu Dinh | Vates XCP-ng Developer

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