[PATCH] vpci: Add resizable bar support

[Jiqian Chen <Jiqian.Chen@xxxxxxx>]

Some devices, like discrete GPU of amd, support resizable bar capability,
but vpci of Xen doesn't support this feature, so they fail to resize bars
and then cause probing failure.

According to PCIe spec, each bar that support resizing has two registers,
PCI_REBAR_CAP and PCI_REBAR_CTRL, so add these two registers and their
corresponding handler into vpci.

PCI_REBAR_CAP is RO, only provide reading.

PCI_REBAR_CTRL only has bar size is RW, so add write function to support
setting the new size.

Signed-off-by: Jiqian Chen <Jiqian.Chen@xxxxxxx>
---
 xen/drivers/vpci/Makefile  |  2 +-
 xen/drivers/vpci/rebar.c   | 89 ++++++++++++++++++++++++++++++++++++++
 xen/include/xen/pci_regs.h | 11 +++++
 3 files changed, 101 insertions(+), 1 deletion(-)
 create mode 100644 xen/drivers/vpci/rebar.c

diff --git a/xen/drivers/vpci/Makefile b/xen/drivers/vpci/Makefile
index 1a1413b93e76..a7c8a30a8956 100644
--- a/xen/drivers/vpci/Makefile
+++ b/xen/drivers/vpci/Makefile
@@ -1,2 +1,2 @@
-obj-y += vpci.o header.o
+obj-y += vpci.o header.o rebar.o
 obj-$(CONFIG_HAS_PCI_MSI) += msi.o msix.o
diff --git a/xen/drivers/vpci/rebar.c b/xen/drivers/vpci/rebar.c
new file mode 100644
index 000000000000..84dbd84b0745
--- /dev/null
+++ b/xen/drivers/vpci/rebar.c
@@ -0,0 +1,89 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2024 Advanced Micro Devices, Inc. All Rights Reserved.
+ *
+ * Author: Jiqian Chen <Jiqian.Chen@xxxxxxx>
+ */
+
+#include <xen/hypercall.h>
+#include <xen/vpci.h>
+
+/*
+ * The number value of the BAR Size in PCI_REBAR_CTRL register reprent:
+ * 0    1 MB (2^20 bytes)
+ * 1    2 MB (2^21 bytes)
+ * 2    4 MB (2^22 bytes)
+ *  ...
+ * 43   8 EB (2^63 bytes)
+ */
+#define PCI_REBAR_CTRL_BAR_UNIT (1ULL << 20)
+
+static void cf_check rebar_ctrl_write(const struct pci_dev *pdev,
+                                      unsigned int reg,
+                                      uint32_t val,
+                                      void *data)
+{
+    uint32_t ctrl, index;
+    struct vpci_bar *bars = pdev->vpci->header.bars;
+
+    ctrl = pci_conf_read32(pdev->sbdf, reg);
+    if ( ctrl == val )
+        return;
+
+    ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
+    if ( ctrl != ( val & ~PCI_REBAR_CTRL_BAR_SIZE ) )
+        return;
+
+    index = ctrl & PCI_REBAR_CTRL_BAR_IDX;
+    bars[index].size = (1 << ((val & PCI_REBAR_CTRL_BAR_SIZE) >>
+                              PCI_REBAR_CTRL_BAR_SHIFT)) *
+                       PCI_REBAR_CTRL_BAR_UNIT;
+
+    pci_conf_write32(pdev->sbdf, reg, val);
+}
+
+static int cf_check init_rebar(struct pci_dev *pdev)
+{
+    unsigned int rebar_offset;
+    uint32_t ctrl, nbars;
+    int rc = 0;
+
+    rebar_offset = pci_find_ext_capability(pdev->sbdf, PCI_EXT_CAP_ID_REBAR);
+
+    if ( !rebar_offset )
+        return rc;
+
+    ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL);
+    nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK) >> PCI_REBAR_CTRL_NBAR_SHIFT;
+
+    for ( int i = 0; i < nbars; i++, rebar_offset += 8 ) {
+        rc = vpci_add_register(pdev->vpci, vpci_hw_read32, NULL,
+                               rebar_offset + PCI_REBAR_CAP, 4, NULL);
+        if ( rc ) {
+            printk("%s: %pp: add register for PCI_REBAR_CAP failed (rc=%d)\n",
+                   __func__, &pdev->sbdf, rc);
+            break;
+        }
+
+        rc = vpci_add_register(pdev->vpci, vpci_hw_read32, rebar_ctrl_write,
+                               rebar_offset + PCI_REBAR_CTRL, 4, NULL);
+        if ( rc ) {
+            printk("%s: %pp: add register for PCI_REBAR_CTRL failed (rc=%d)\n",
+                   __func__, &pdev->sbdf, rc);
+            break;
+        }
+    }
+
+    return rc;
+}
+REGISTER_VPCI_INIT(init_rebar, VPCI_PRIORITY_LOW);
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * tab-width: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/xen/pci_regs.h b/xen/include/xen/pci_regs.h
index 250ba106dbd3..5d2aa130916e 100644
--- a/xen/include/xen/pci_regs.h
+++ b/xen/include/xen/pci_regs.h
@@ -459,6 +459,7 @@
 #define PCI_EXT_CAP_ID_ARI     14
 #define PCI_EXT_CAP_ID_ATS     15
 #define PCI_EXT_CAP_ID_SRIOV   16
+#define PCI_EXT_CAP_ID_REBAR   21      /* Resizable BAR */
 
 /* Advanced Error Reporting */
 #define PCI_ERR_UNCOR_STATUS   4       /* Uncorrectable Error Status */
@@ -541,6 +542,16 @@
 #define  PCI_VNDR_HEADER_REV(x)        (((x) >> 16) & 0xf)
 #define  PCI_VNDR_HEADER_LEN(x)        (((x) >> 20) & 0xfff)
 
+/* Resizable BARs */
+#define PCI_REBAR_CAP          4       /* capability register */
+#define  PCI_REBAR_CAP_SIZES           0x00FFFFF0  /* supported BAR sizes */
+#define PCI_REBAR_CTRL         8       /* control register */
+#define  PCI_REBAR_CTRL_BAR_IDX                0x00000007  /* BAR index */
+#define  PCI_REBAR_CTRL_NBAR_MASK      0x000000E0  /* # of resizable BARs */
+#define  PCI_REBAR_CTRL_NBAR_SHIFT     5           /* shift for # of BARs */
+#define  PCI_REBAR_CTRL_BAR_SIZE       0x00001F00  /* BAR size */
+#define  PCI_REBAR_CTRL_BAR_SHIFT      8           /* shift for BAR size */
+
 /*
  * Hypertransport sub capability types
  *
-- 
2.34.1