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Re: [PATCH v3 5/6] xen/arm: mpu: Enable MPU


  • To: Julien Grall <julien@xxxxxxx>
  • From: Luca Fancellu <Luca.Fancellu@xxxxxxx>
  • Date: Tue, 22 Oct 2024 09:56:06 +0000
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  • Cc: Ayan Kumar Halder <ayankuma@xxxxxxx>, Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Tue, 22 Oct 2024 09:56:34 +0000
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  • Thread-topic: [PATCH v3 5/6] xen/arm: mpu: Enable MPU


> On 22 Oct 2024, at 10:47, Julien Grall <julien@xxxxxxx> wrote:
> 
> Hi Luca,
> 
> On 22/10/2024 10:41, Luca Fancellu wrote:
>>> On 21 Oct 2024, at 17:27, Julien Grall <julien@xxxxxxx> wrote:
>> 2) dsb+isb barrier after enabling the MPU, since we are enabling the MPU but 
>> also because we are disabling the background region
> 
> TBH, I don't understand this one. Why would disabling the background region 
> requires a dsb + isb? Do you have any pointer in the Armv8-R specification?

I’m afraid this is only my deduction, Section C1.4 of the Arm® Architecture 
Reference Manual Supplement Armv8, for R-profile AArch64 architecture,
(DDI 0600B.a) explains what is the background region, it says it implements 
physical address range(s), so when we disable it, we would like any data
access to complete before changing this implementation defined range with the 
ranges defined by us tweaking PRBAR/PRLAR, am I right?


> 
> Cheers,
> 
> -- 
> Julien Grall
> 


 


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