[XEN PATCH v2 3/5] x86/spec-ctrl: configurable Intlel/AMD-specific calculations

[Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx>]

Put platforms-specific code under #ifdef CONFIG_{AMD,INTEL} so that when
corresponding CPU support is disabled by configuration less dead code will end
up in the build.

This includes re-ordering of calls to ibpb_calculations() & div_calculations(),
but since they don't access common variables or feature bits it should be
safe to do.

Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx>
CC: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/spec_ctrl.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 75a4177a75..ba6c3e80d2 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -1012,6 +1012,7 @@ static bool __init should_use_eager_fpu(void)
     }
 }
 
+#ifdef CONFIG_AMD
 /*
  * 
https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf
  */
@@ -1110,6 +1111,7 @@ static void __init div_calculations(bool hw_smt_enabled)
             "enabled.  Please assess your configuration and choose an\n"
             "explicit 'smt=<bool>' setting.  See XSA-439.\n");
 }
+#endif /* CONFIG_AMD */
 
 static void __init ibpb_calculations(void)
 {
@@ -1319,6 +1321,7 @@ static __init void l1tf_calculations(void)
                                             : (3UL << (paddr_bits - 2))));
 }
 
+#ifdef CONFIG_INTEL
 /* Calculate whether this CPU is vulnerable to MDS. */
 static __init void mds_calculations(void)
 {
@@ -1730,6 +1733,8 @@ static void __init bhi_calculations(void)
     }
 }
 
+#endif /* CONFIG_INTEL */
+
 void spec_ctrl_init_domain(struct domain *d)
 {
     bool pv = is_pv_domain(d);
@@ -2025,11 +2030,13 @@ void __init init_speculation_mitigations(void)
             default_scf |= SCF_ist_rsb;
     }
 
+#ifdef CONFIG_AMD
     srso_calculations(hw_smt_enabled);
 
-    ibpb_calculations();
-
     div_calculations(hw_smt_enabled);
+#endif
+
+    ibpb_calculations();
 
     /* Check whether Eager FPU should be enabled by default. */
     if ( opt_eager_fpu == -1 )
@@ -2136,9 +2143,10 @@ void __init init_speculation_mitigations(void)
      * - March 2023, for RFDS.  Enumerate RFDS_CLEAR to mean that VERW now
      *   scrubs non-architectural entries from certain register files.
      */
+#ifdef CONFIG_INTEL
     mds_calculations();
     rfds_calculations();
-
+#endif
     /*
      * Parts which enumerate FB_CLEAR are those with now-updated microcode
      * which weren't susceptible to the original MFBDS (and therefore didn't
@@ -2255,7 +2263,6 @@ void __init init_speculation_mitigations(void)
         opt_tsx = 0;
         tsx_init();
     }
-#endif
 
     /*
      * On some SRBDS-affected hardware, it may be safe to relax srb-lock by
@@ -2286,6 +2293,8 @@ void __init init_speculation_mitigations(void)
 
     bhi_calculations();
 
+#endif /* CONFIG_INTEL */
+
     print_details(thunk);
 
     /*
-- 
2.25.1