[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XEN PATCH 04/13] x86/vpmu: address violations of MISRA C Rule 16.3
Add missing break statements to address violations of MISRA C Rule 16.3: "An unconditional `break' statement shall terminate every switch-clause". No functional change. Signed-off-by: Federico Serafini <federico.serafini@xxxxxxxxxxx> --- xen/arch/x86/cpu/vpmu.c | 3 +++ xen/arch/x86/cpu/vpmu_intel.c | 1 + 2 files changed, 4 insertions(+) diff --git a/xen/arch/x86/cpu/vpmu.c b/xen/arch/x86/cpu/vpmu.c index a7bc0cd1fc..b2ba999412 100644 --- a/xen/arch/x86/cpu/vpmu.c +++ b/xen/arch/x86/cpu/vpmu.c @@ -663,6 +663,8 @@ long do_xenpmu_op( if ( pmu_params.version.maj != XENPMU_VER_MAJ ) return -EINVAL; + + break; } switch ( op ) @@ -776,6 +778,7 @@ long do_xenpmu_op( default: ret = -EINVAL; + break; } return ret; diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index cd414165df..46f3ff86e7 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -713,6 +713,7 @@ static int cf_check core2_vpmu_do_rdmsr(unsigned int msr, uint64_t *msr_content) break; default: rdmsrl(msr, *msr_content); + break; } } else if ( msr == MSR_IA32_MISC_ENABLE ) -- 2.34.1
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