[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [XEN PATCH v10 3/5] x86/pvh: Add PHYSDEVOP_setup_gsi for PVH dom0
On 18.06.2024 08:57, Chen, Jiqian wrote: > On 2024/6/17 22:52, Jan Beulich wrote: >> On 17.06.2024 11:00, Jiqian Chen wrote: >>> The gsi of a passthrough device must be configured for it to be >>> able to be mapped into a hvm domU. >>> But When dom0 is PVH, the gsis don't get registered, it causes >>> the info of apic, pin and irq not be added into irq_2_pin list, >>> and the handler of irq_desc is not set, then when passthrough a >>> device, setting ioapic affinity and vector will fail. >>> >>> To fix above problem, on Linux kernel side, a new code will >>> need to call PHYSDEVOP_setup_gsi for passthrough devices to >>> register gsi when dom0 is PVH. >>> >>> So, add PHYSDEVOP_setup_gsi into hvm_physdev_op for above >>> purpose. >>> >>> Signed-off-by: Jiqian Chen <Jiqian.Chen@xxxxxxx> >>> Signed-off-by: Huang Rui <ray.huang@xxxxxxx> >>> Signed-off-by: Jiqian Chen <Jiqian.Chen@xxxxxxx> >>> --- >>> The code link that will call this hypercall on linux kernel side is as >>> follows: >>> https://lore.kernel.org/xen-devel/20240607075109.126277-3-Jiqian.Chen@xxxxxxx/ >> >> One of my v9 comments was addressed, thanks. Repeating the other, unaddressed >> one here: >> "As to GSIs not being registered: If that's not a problem for Dom0's own >> operation, I think it'll also want/need explaining why what is sufficient >> for >> Dom0 alone isn't sufficient when pass-through comes into play." > I have modified the commit message to describe why GSIs are not registered > can cause passthrough not work, according to this v9 comment. > " it causes the info of apic, pin and irq not be added into irq_2_pin list, > and the handler of irq_desc is not set, then when passthrough a device, > setting ioapic affinity and vector will fail." > What description do you want me to add? What I'd first like to have clarification on (i.e. before putting it in the description one way or another): How come Dom0 alone gets away fine without making the call, yet for passthrough-to-DomU it's needed? Is it perhaps that it just so happened that for Dom0 things have been working on systems where it was tested, but the call should in principle have been there in this case, too [1]? That (to me at least) would make quite a difference for both this patch's description and us accepting it. Jan [1] Alternative e.g. being that because of other actions PVH Dom0 takes, like the IO-APIC RTE programming it does for IRQs it wants to use for itself, the necessary information is already suitably conveyed to Xen in that case. In such a case imo it's relevant to mention in the description. Not the least because iirc the pciback driver sets up a fake IRQ handler in such cases, which ought to lead to similar IO-APIC RTE programming, at which point the question would again arise why the hypercall needs exposing.
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