[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XEN PATCH v2 3/5] x86/MCE: guard access to Intel/AMD-specific MCA MSRs
Add build-time checks for newly introduced INTEL/AMD config options when calling vmce_{intel/amd}_{rdmsr/wrmsr}() routines. This way a platform-specific code can be omitted in vmce code, if this platform is disabled in config. Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> CC: Jan Beulich <jbeulich@xxxxxxxx> --- changes in v2: - use #ifdef/#endif in switch instead of IS_ENABLED - fallback to returning default 0 if vendor not recognized --- xen/arch/x86/cpu/mcheck/vmce.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index 94d1f021e1..373a8e2452 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -138,17 +138,19 @@ static int bank_mce_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val) default: switch ( boot_cpu_data.x86_vendor ) { +#ifdef CONFIG_INTEL case X86_VENDOR_CENTAUR: case X86_VENDOR_SHANGHAI: case X86_VENDOR_INTEL: ret = vmce_intel_rdmsr(v, msr, val); break; - +#endif +#ifdef CONFIG_AMD case X86_VENDOR_AMD: case X86_VENDOR_HYGON: ret = vmce_amd_rdmsr(v, msr, val); break; - +#endif default: ret = 0; break; @@ -271,15 +273,17 @@ static int bank_mce_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) default: switch ( boot_cpu_data.x86_vendor ) { +#ifdef CONFIG_INTEL case X86_VENDOR_INTEL: ret = vmce_intel_wrmsr(v, msr, val); break; - +#endif +#ifdef CONFIG_AMD case X86_VENDOR_AMD: case X86_VENDOR_HYGON: ret = vmce_amd_wrmsr(v, msr, val); break; - +#endif default: ret = 0; break; -- 2.25.1
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