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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [XEN PATCH v1 12/15] x86/vmx: introduce helper function for vmcs macro
Instead of directly accessing control variables from vmcs macros let
intermediate helper routine vmx_ctrl_has_feature() do it. This way
we can turn all the VMX-related macros off, if building for non VT-d platform,
by tweaking only a single helper's function behaviour.
No functional change intended.
Signed-off-by: Sergiy Kibrik <Sergiy_Kibrik@xxxxxxxx>
---
xen/arch/x86/include/asm/hvm/vmx/vmcs.h | 89 ++++++++++++++++---------
xen/arch/x86/include/asm/hvm/vmx/vmx.h | 28 +++++---
2 files changed, 74 insertions(+), 43 deletions(-)
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
index a7dd2eeffc..fd197e2603 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h
@@ -287,6 +287,11 @@ extern uint64_t vmx_tertiary_exec_control;
#define VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL 0x80000000000ULL
extern u64 vmx_ept_vpid_cap;
+static inline bool vmx_ctrl_has_feature(uint64_t control, unsigned long
feature)
+{
+ return control & feature;
+}
+
#define VMX_MISC_ACTIVITY_MASK 0x000001c0
#define VMX_MISC_PROC_TRACE 0x00004000
#define VMX_MISC_CR3_TARGET 0x01ff0000
@@ -295,69 +300,89 @@ extern u64 vmx_ept_vpid_cap;
#define VMX_TSC_MULTIPLIER_MAX 0xffffffffffffffffULL
#define cpu_has_wbinvd_exiting \
- (vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_WBINVD_EXITING)
#define cpu_has_vmx_virtualize_apic_accesses \
- (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control,\
+ SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)
#define cpu_has_vmx_tpr_shadow \
- (vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW)
+ vmx_ctrl_has_feature(vmx_cpu_based_exec_control, CPU_BASED_TPR_SHADOW)
#define cpu_has_vmx_vnmi \
- (vmx_pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS)
+ vmx_ctrl_has_feature(vmx_pin_based_exec_control, PIN_BASED_VIRTUAL_NMIS)
#define cpu_has_vmx_msr_bitmap \
- (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP)
+ vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \
+ CPU_BASED_ACTIVATE_MSR_BITMAP)
#define cpu_has_vmx_secondary_exec_control \
- (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
+ vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \
+ CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
#define cpu_has_vmx_tertiary_exec_control \
- (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS)
+ vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \
+ CPU_BASED_ACTIVATE_TERTIARY_CONTROLS)
#define cpu_has_vmx_ept \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_ENABLE_EPT)
#define cpu_has_vmx_dt_exiting \
- (vmx_secondary_exec_control & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING)
#define cpu_has_vmx_rdtscp \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_ENABLE_RDTSCP)
#define cpu_has_vmx_vpid \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_ENABLE_VPID)
#define cpu_has_monitor_trap_flag \
- (vmx_cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG)
+ vmx_ctrl_has_feature(vmx_cpu_based_exec_control, \
+ CPU_BASED_MONITOR_TRAP_FLAG)
#define cpu_has_vmx_pat \
- (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_PAT)
+ vmx_ctrl_has_feature(vmx_vmentry_control, VM_ENTRY_LOAD_GUEST_PAT)
#define cpu_has_vmx_efer \
- (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_EFER)
+ vmx_ctrl_has_feature(vmx_vmentry_control, VM_ENTRY_LOAD_GUEST_EFER)
#define cpu_has_vmx_unrestricted_guest \
- (vmx_secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_UNRESTRICTED_GUEST)
#define vmx_unrestricted_guest(v) \
((v)->arch.hvm.vmx.secondary_exec_control & \
SECONDARY_EXEC_UNRESTRICTED_GUEST)
#define cpu_has_vmx_ple \
- (vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_PAUSE_LOOP_EXITING)
#define cpu_has_vmx_invpcid \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_ENABLE_INVPCID)
#define cpu_has_vmx_apic_reg_virt \
- (vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_APIC_REGISTER_VIRT)
#define cpu_has_vmx_virtual_intr_delivery \
- (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)
#define cpu_has_vmx_virtualize_x2apic_mode \
- (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE)
#define cpu_has_vmx_posted_intr_processing \
- (vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT)
+ vmx_ctrl_has_feature(vmx_pin_based_exec_control,
PIN_BASED_POSTED_INTERRUPT)
#define cpu_has_vmx_vmcs_shadowing \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_ENABLE_VMCS_SHADOWING)
#define cpu_has_vmx_vmfunc \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_ENABLE_VM_FUNCTIONS)
#define cpu_has_vmx_virt_exceptions \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS)
#define cpu_has_vmx_pml \
- (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_ENABLE_PML)
#define cpu_has_vmx_mpx \
- ((vmx_vmexit_control & VM_EXIT_CLEAR_BNDCFGS) && \
- (vmx_vmentry_control & VM_ENTRY_LOAD_BNDCFGS))
+ (vmx_ctrl_has_feature(vmx_vmexit_control, VM_EXIT_CLEAR_BNDCFGS) && \
+ vmx_ctrl_has_feature(vmx_vmentry_control, VM_ENTRY_LOAD_BNDCFGS))
#define cpu_has_vmx_xsaves \
- (vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, SECONDARY_EXEC_XSAVES)
#define cpu_has_vmx_tsc_scaling \
- (vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control,
SECONDARY_EXEC_TSC_SCALING)
#define cpu_has_vmx_bus_lock_detection \
- (vmx_secondary_exec_control & SECONDARY_EXEC_BUS_LOCK_DETECTION)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_BUS_LOCK_DETECTION)
#define cpu_has_vmx_notify_vm_exiting \
- (vmx_secondary_exec_control & SECONDARY_EXEC_NOTIFY_VM_EXITING)
+ vmx_ctrl_has_feature(vmx_secondary_exec_control, \
+ SECONDARY_EXEC_NOTIFY_VM_EXITING)
#define VMCS_RID_TYPE_MASK 0x80000000U
@@ -381,7 +406,7 @@ extern u64 vmx_ept_vpid_cap;
extern u64 vmx_basic_msr;
#define cpu_has_vmx_ins_outs_instr_info \
- (!!(vmx_basic_msr & VMX_BASIC_INS_OUT_INFO))
+ (!!vmx_ctrl_has_feature(vmx_basic_msr, VMX_BASIC_INS_OUT_INFO))
/* Guest interrupt status */
#define VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK 0x0FF
diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
index 8ffab7d94c..587772dc51 100644
--- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h
+++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h
@@ -279,17 +279,22 @@ typedef union cr_access_qual {
extern uint8_t posted_intr_vector;
#define cpu_has_vmx_ept_exec_only_supported \
- (vmx_ept_vpid_cap & VMX_EPT_EXEC_ONLY_SUPPORTED)
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_EXEC_ONLY_SUPPORTED)
#define cpu_has_vmx_ept_wl4_supported \
- (vmx_ept_vpid_cap & VMX_EPT_WALK_LENGTH_4_SUPPORTED)
-#define cpu_has_vmx_ept_mt_uc (vmx_ept_vpid_cap & VMX_EPT_MEMORY_TYPE_UC)
-#define cpu_has_vmx_ept_mt_wb (vmx_ept_vpid_cap & VMX_EPT_MEMORY_TYPE_WB)
-#define cpu_has_vmx_ept_2mb (vmx_ept_vpid_cap & VMX_EPT_SUPERPAGE_2MB)
-#define cpu_has_vmx_ept_1gb (vmx_ept_vpid_cap & VMX_EPT_SUPERPAGE_1GB)
-#define cpu_has_vmx_ept_ad (vmx_ept_vpid_cap & VMX_EPT_AD_BIT)
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_WALK_LENGTH_4_SUPPORTED)
+#define cpu_has_vmx_ept_mt_uc \
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_MEMORY_TYPE_UC)
+#define cpu_has_vmx_ept_mt_wb \
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_MEMORY_TYPE_WB)
+#define cpu_has_vmx_ept_2mb \
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_SUPERPAGE_2MB)
+#define cpu_has_vmx_ept_1gb \
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_SUPERPAGE_1GB)
+#define cpu_has_vmx_ept_ad \
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_AD_BIT)
#define cpu_has_vmx_ept_invept_single_context \
- (vmx_ept_vpid_cap & VMX_EPT_INVEPT_SINGLE_CONTEXT)
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_EPT_INVEPT_SINGLE_CONTEXT)
#define EPT_2MB_SHIFT 16
#define EPT_1GB_SHIFT 17
@@ -300,11 +305,12 @@ extern uint8_t posted_intr_vector;
#define INVEPT_ALL_CONTEXT 2
#define cpu_has_vmx_vpid_invvpid_individual_addr \
- (vmx_ept_vpid_cap & VMX_VPID_INVVPID_INDIVIDUAL_ADDR)
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_VPID_INVVPID_INDIVIDUAL_ADDR)
#define cpu_has_vmx_vpid_invvpid_single_context \
- (vmx_ept_vpid_cap & VMX_VPID_INVVPID_SINGLE_CONTEXT)
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, VMX_VPID_INVVPID_SINGLE_CONTEXT)
#define cpu_has_vmx_vpid_invvpid_single_context_retaining_global \
- (vmx_ept_vpid_cap & VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL)
+ vmx_ctrl_has_feature(vmx_ept_vpid_cap, \
+ VMX_VPID_INVVPID_SINGLE_CONTEXT_RETAINING_GLOBAL)
#define INVVPID_INDIVIDUAL_ADDR 0
#define INVVPID_SINGLE_CONTEXT 1
--
2.25.1
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