Re: [PATCH v5 12/23] xen/riscv: introduce io.h

[Oleksii <oleksii.kurochko@xxxxxxxxx>]

On Thu, 2024-03-07 at 21:49 +0100, Oleksii wrote:
> On Thu, 2024-03-07 at 18:14 +0100, Jan Beulich wrote:
> > For plain writes it should at least be "=Qo" then, yes.
> Constraints Q is a machine specific constraint, and I am not sure
> that
> it makes sense to use "=o" only and probably it is a reason why it is
> enough only "r". Does it make sense?
Probably for RISC-V can be used:
RISC-V—config/riscv/constraints.md
   ...
   A
       An address that is held in a general-purpose register.
   ...

AArch64 family—config/aarch64/constraints.md:
   ...
   Q
       A memory address which uses a single base register with no
   offset
   ...
Also 'no offset' explains why it was added 'o' constraint for Arm
additionally.

~ Oleksii

> 
> >  To me making those
> > input operands on Arm can't have been quite right.
> I  don't understand why they both are input, logically it looks like
> an
> address should be an output.
> 
> ~ Oleksii
>