[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[RFC XEN PATCH v3 2/3] x86/pvh: Add (un)map_pirq and setup_gsi for PVH dom0


  • To: Jan Beulich <jbeulich@xxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, "Daniel P . Smith" <dpsmith@xxxxxxxxxxxxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, "Juergen Gross" <jgross@xxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: Jiqian Chen <Jiqian.Chen@xxxxxxx>
  • Date: Mon, 11 Dec 2023 00:40:08 +0800
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=suse.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0)
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=jjpP9b3zdAapc7bFnAf9Yxc26I+r5JBx8/ouifmxHE0=; b=KaFy88ybxPq8yiz6n27imhdsHVqE+pZectAkpNy89+65NmnzuJWdDTPWH5zpzVoLCLaRgjLR9fW7AyRHr7lKo3bkjRJ+mdiMRH09xmow6nYiaMuBl3uYRFxZcNyTCFBiMQN+L75lxObkk8jG4yteCIlmR+t/DuSv+8RWaIjVnd+RF3op5h0/nl3LX41m9TlRu+yCM/I6jgVQ19106Vo436Paa19Ew9hCgLkkJDRuMo+hh1d7V6y2tCWHMKVEJS2sgFCLC5/+JUhbqKd6jViRWEroKANTCRH4TYFkvjA7TQQPiG8rBLz1Oz9iP9QR0aKCAWBb3aAokJATDrV1wz7qbw==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=B3Rcv3Gx+o5+ABVciEZUNBnCUbx9HGEI7j+S4l1Vbp3He0APGUqgLr02XEUJL/CY+oS1rTY8oU8rxpYc+k/CsmUULYiJOxfdiLmbANV9JHkBw479jzPvGZ8yagXQTO38EAviY2qMK4gr3Iykxb2V07tipeQOm81NuRl3UIookvNOle0FE+J7IN7NMApTibJeZgtXYpFV6cjtFIgQsDhS50/CSAIULaerbPAxerRXI1AR0wrLfjgegVTtvJFvkuCkcQsSgTFvwqQkMqK0rDXb5z4fvR8JTKYTjWMm65K8h1dheEdUVLGE1pugbGXFDbg09NKiHFwSuRdUYCD5vMH78g==
  • Cc: Stewart Hildebrand <Stewart.Hildebrand@xxxxxxx>, Alex Deucher <Alexander.Deucher@xxxxxxx>, Xenia Ragiadakou <xenia.ragiadakou@xxxxxxx>, Stefano Stabellini <stefano.stabellini@xxxxxxx>, Huang Rui <Ray.Huang@xxxxxxx>, Honglei Huang <Honglei1.Huang@xxxxxxx>, Julia Zhang <Julia.Zhang@xxxxxxx>, Jiqian Chen <Jiqian.Chen@xxxxxxx>, Huang Rui <ray.huang@xxxxxxx>
  • Delivery-date: Sun, 10 Dec 2023 16:40:46 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

If run Xen with PVH dom0 and hvm domU, hvm will map a pirq for
a passthrough device by using gsi, see
xen_pt_realize->xc_physdev_map_pirq and
pci_add_dm_done->xc_physdev_map_pirq. Then xc_physdev_map_pirq
will call into Xen, but in hvm_physdev_op, PHYSDEVOP_map_pirq
is not allowed because currd is PVH dom0 and PVH has no
X86_EMU_USE_PIRQ flag, it will fail at has_pirq check.
So, allow PHYSDEVOP_map_pirq when currd is dom0 no matter if
dom0 has X86_EMU_USE_PIRQ flag and also allow
PHYSDEVOP_unmap_pirq for the failed path to unmap pirq.

What's more, in PVH dom0, the gsis don't get registered, but
the gsi of a passthrough device must be configured for it to
be able to be mapped into a hvm domU.
So, add PHYSDEVOP_setup_gsi for PVH dom0, because PVH dom0
will setup gsi during assigning a device to passthrough.

Co-developed-by: Huang Rui <ray.huang@xxxxxxx>
Signed-off-by: Jiqian Chen <Jiqian.Chen@xxxxxxx>
---
 xen/arch/x86/hvm/hypercall.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c
index 6ad5b4d5f1..621d789bd3 100644
--- a/xen/arch/x86/hvm/hypercall.c
+++ b/xen/arch/x86/hvm/hypercall.c
@@ -72,8 +72,11 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) 
arg)
 
     switch ( cmd )
     {
+    case PHYSDEVOP_setup_gsi:
     case PHYSDEVOP_map_pirq:
     case PHYSDEVOP_unmap_pirq:
+        if ( is_hardware_domain(currd) )
+            break;
     case PHYSDEVOP_eoi:
     case PHYSDEVOP_irq_status_query:
     case PHYSDEVOP_get_free_pirq:
-- 
2.34.1




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.