Re: [PATCH v10 05/38] x86/trapnr: Add event type macros to <asm/trapnr.h>

[andrew.cooper3@xxxxxxxxxx]

On 14/09/2023 5:47 am, Xin Li wrote:
> Intel VT-x classifies events into eight different types, which is
> inherited by FRED for event identification. As such, event type
> becomes a common x86 concept, and should be defined in a common x86
> header.
>
> Add event type macros to <asm/trapnr.h>, and use it in <asm/vmx.h>.
>
> Suggested-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx>
> Tested-by: Shan Kang <shan.kang@xxxxxxxxx>
> Signed-off-by: Xin Li <xin3.li@xxxxxxxxx>
> ---
>  arch/x86/include/asm/trapnr.h | 12 ++++++++++++
>  arch/x86/include/asm/vmx.h    | 17 +++++++++--------
>  2 files changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/include/asm/trapnr.h b/arch/x86/include/asm/trapnr.h
> index f5d2325aa0b7..ab7e4c9d666f 100644
> --- a/arch/x86/include/asm/trapnr.h
> +++ b/arch/x86/include/asm/trapnr.h
> @@ -2,6 +2,18 @@
>  #ifndef _ASM_X86_TRAPNR_H
>  #define _ASM_X86_TRAPNR_H
>  
> +/*
> + * Event type codes used by both FRED and Intel VT-x

And AMD SVM.  This enumeration has never been unique to just VT-x.

> + */
> +#define EVENT_TYPE_EXTINT    0       // External interrupt
> +#define EVENT_TYPE_RESERVED  1
> +#define EVENT_TYPE_NMI               2       // NMI
> +#define EVENT_TYPE_HWEXC     3       // Hardware originated traps, exceptions
> +#define EVENT_TYPE_SWINT     4       // INT n
> +#define EVENT_TYPE_PRIV_SWEXC        5       // INT1
> +#define EVENT_TYPE_SWEXC     6       // INT0, INT3

Typo.  into, not int0  (the difference shows up more clearly in lower case.)

> diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
> index 0e73616b82f3..c84acfefcd31 100644
> --- a/arch/x86/include/asm/vmx.h
> +++ b/arch/x86/include/asm/vmx.h
> @@ -374,14 +375,14 @@ enum vmcs_field {
>  #define VECTORING_INFO_DELIVER_CODE_MASK     INTR_INFO_DELIVER_CODE_MASK
>  #define VECTORING_INFO_VALID_MASK            INTR_INFO_VALID_MASK
>  
> -#define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */
> -#define INTR_TYPE_RESERVED              (1 << 8) /* reserved */
> -#define INTR_TYPE_NMI_INTR           (2 << 8) /* NMI */
> -#define INTR_TYPE_HARD_EXCEPTION     (3 << 8) /* processor exception */
> -#define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
> -#define INTR_TYPE_PRIV_SW_EXCEPTION  (5 << 8) /* ICE breakpoint - 
> undocumented */
> -#define INTR_TYPE_SOFT_EXCEPTION     (6 << 8) /* software exception */
> -#define INTR_TYPE_OTHER_EVENT           (7 << 8) /* other event */
> +#define INTR_TYPE_EXT_INTR           (EVENT_TYPE_EXTINT << 8)        /* 
> external interrupt */
> +#define INTR_TYPE_RESERVED           (EVENT_TYPE_RESERVED << 8)      /* 
> reserved */
> +#define INTR_TYPE_NMI_INTR           (EVENT_TYPE_NMI << 8)           /* NMI 
> */
> +#define INTR_TYPE_HARD_EXCEPTION     (EVENT_TYPE_HWEXC << 8)         /* 
> processor exception */
> +#define INTR_TYPE_SOFT_INTR          (EVENT_TYPE_SWINT << 8)         /* 
> software interrupt */
> +#define INTR_TYPE_PRIV_SW_EXCEPTION  (EVENT_TYPE_PRIV_SWEXC << 8)    /* ICE 
> breakpoint - undocumented */

ICEBP/INT1 is no longer undocumented.

~Andrew