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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH 8/8] x86/spec-ctrl: Mitigate the Zen1 DIV leakge
On Wed, Sep 13, 2023 at 6:09 PM Andrew Cooper <andrew.cooper3@xxxxxxxxxx> wrote:
> @@ -955,6 +960,40 @@ static void __init srso_calculations(bool hw_smt_enabled)
> setup_force_cpu_cap(X86_FEATURE_SRSO_NO);
> }
>
> +/*
> + * Div leakage is specific to the AMD Zen1 microarchitecure. Use STIBP as a
> + * heuristic to select between Zen1 and Zen2 uarches.
> + */
> +static bool __init has_div_vuln(void)
> +{
> + if ( !(boot_cpu_data.x86_vendor &
> + (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
> + return false;
> +
> + if ( (boot_cpu_data.x86 != 0x17 && boot_cpu_data.x86 != 0x18) ||
> + !boot_cpu_has(X86_FEATURE_AMD_STIBP) )
> + return false;
> +
> + return true;
> +}
> +
> +static void __init div_calculations(bool hw_smt_enabled)
> +{
> + bool cpu_bug_div = has_div_vuln();
> +
Would it make sense to add
if ( !cpu_bug_div )
return
...
> + if ( opt_div_scrub == -1 )
> + opt_div_scrub = cpu_bug_div;
> +
> + if ( opt_div_scrub )
> + setup_force_cpu_cap(X86_FEATURE_SC_DIV);
...so that div-scrub=1 isn't setting X86_FEATURE_SC_DIV on un-affected
hardware? Or do you want to leave command line control in place in
case it might be needed as a future workaround on other hardware?
Thanks,
Jason
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