[PATCH RESEND v9 12/36] x86/fred: Update MSR_IA32_FRED_RSP0 during task switch

[Xin Li <xin3.li@xxxxxxxxx>]

From: "H. Peter Anvin (Intel)" <hpa@xxxxxxxxx>

MSR_IA32_FRED_RSP0 is used during ring 3 event delivery, and needs to
be updated to point to the top of next task stack during task switch.

Update MSR_IA32_FRED_RSP0 with WRMSR instruction for now, and will use
WRMSRNS/WRMSRLIST for performance once it gets upstreamed.

Signed-off-by: H. Peter Anvin (Intel) <hpa@xxxxxxxxx>
Tested-by: Shan Kang <shan.kang@xxxxxxxxx>
Signed-off-by: Xin Li <xin3.li@xxxxxxxxx>
---
 arch/x86/include/asm/switch_to.h | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h
index f42dbf17f52b..6c911fd400b2 100644
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -70,9 +70,16 @@ static inline void update_task_stack(struct task_struct 
*task)
 #ifdef CONFIG_X86_32
        this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0);
 #else
-       /* Xen PV enters the kernel on the thread stack. */
-       if (cpu_feature_enabled(X86_FEATURE_XENPV))
+       if (cpu_feature_enabled(X86_FEATURE_FRED)) {
+               /*
+                * Will use WRMSRNS/WRMSRLIST for performance once it's 
upstreamed.
+                */
+               wrmsrl(MSR_IA32_FRED_RSP0,
+                      (unsigned long)task_stack_page(task) + THREAD_SIZE);
+       } else if (cpu_feature_enabled(X86_FEATURE_XENPV)) {
+               /* Xen PV enters the kernel on the thread stack. */
                load_sp0(task_top_of_stack(task));
+       }
 #endif
 }
 
-- 
2.34.1