[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [PATCH v4 4/4] x86/iommu: pass full IO-APIC RTE for remapping table update


  • To: Pau Monné, Roger <roger.pau@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • From: "Tian, Kevin" <kevin.tian@xxxxxxxxx>
  • Date: Tue, 1 Aug 2023 02:58:32 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ltQMYegyRPp06TIFDLMsKOeZJCfiFN4LHFI3kdSFC5A=; b=FF9OCYPIR60+fbvxAKBeB4Ad9DYdAiONGUkG2kJfCGMISBFgK9KMEQVRKKh9uPfW6xE05xphITsZafEMmn31MZAylANRkusl15EzTa0m2Al+LPJ0VjEll3e80shiONV+hZZM11Y6kA2q+DNUUlnqiYIDOgJbnaEBtiHHh7p3ZxUO+TWpDcAIZBVylgVCyxb1/QxraWkC0KHOV5FuYznNBhYGBuIVFnJeMmg/KraAhw5Ox1FrvuPkw5kEFoCtyld7d7V0dEQ2fLwu+9gbvUQit3/K1pgNWAOWINYHTClvdyipMoeuWzlYWgoMETvP0qyU7WhdKyPC6b9orvAhdQIRww==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=CtRZlBkcxMHZuuXRs91QC3MRpbrlddy6AVHNpBjeLHWBJ/vNovuQzGM4DPyP13NCIffvg9S+M+caJLOFymSRaCibUBZw/EEVNGJHopcNvrMb9dZRjnRUyetkbmQ6eT1LOA+TdynnILrrMpVwB2WeQui/gI4Cz/U4E8XTFdk86IffQUSPslz6RhJ2T+NwSo8d7YdTkjZzHINbS407nVdzE3dAQk/X5sNKNo9+SRkLqTs4pGuNHoYmfAbdjoLlaGOo8A7uXVwbIOORlRw8BDEea9/lggvV3Ybrx+/FtZoxpZnKMPyyi9ZuPFwPWk6x5fk3ode6hUmdmBnzB/IcrnNt2g==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com;
  • Cc: Pau Monné, Roger <roger.pau@xxxxxxxxxx>, "Beulich, Jan" <JBeulich@xxxxxxxx>, "andrew.cooper3@xxxxxxxxxx" <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Paul Durrant <paul@xxxxxxx>
  • Delivery-date: Tue, 01 Aug 2023 02:59:01 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Thread-index: AQHZwToNmh8G0I7e7EOZhmA6b/SBHq/UxZCw
  • Thread-topic: [PATCH v4 4/4] x86/iommu: pass full IO-APIC RTE for remapping table update

> From: Roger Pau Monne <roger.pau@xxxxxxxxxx>
> Sent: Friday, July 28, 2023 5:57 PM
> 
> So that the remapping entry can be updated atomically when possible.
> 
> Doing such update atomically will avoid Xen having to mask the IO-APIC
> pin prior to performing any interrupt movements (ie: changing the
> destination and vector fields), as the interrupt remapping entry is
> always consistent.
> 
> This also simplifies some of the logic on both VT-d and AMD-Vi
> implementations, as having the full RTE available instead of half of
> it avoids to possibly read and update the missing other half from
> hardware.
> 
> While there remove the explicit zeroing of new_ire fields in
> ioapic_rte_to_remap_entry() and initialize the variable at definition
> so all fields are zeroed.  Note fields could be also initialized with
> final values at definition, but I found that likely too much to be
> done at this time.
> 
> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.