Re: xen cache colors in ARM

[Julien Grall <julien@xxxxxxx>]

Hi,

I have added back xen-devel and the others. Please reply to all, so they 
can have the full conversation.
On 18/04/2023 11:13, Oleg Nikitenko wrote:
> > HW
> Board: Xilinx ZynqMP
> > Where are the banks located?
> > Where are the banks located?
> I did not catch this question. Could you rephrase it ?
I am referring to the memory bank. But you provided the board, so we 
should be able to infer them.
> > Where do you load the various modules (e.g. kernel, xen...)?
> BOOTMOD_XEN,
> BOOTMOD_FDT,
> BOOTMOD_KERNEL
At which address do you load them? What are there size?

> Should I use another branch ?
> If yes then which one ?
I don't know which branch would work on Xilinx ZynqMP with cache 
coloring (although I would assume that upstream + the series on the ML 
[1] work).

> A company's active branch is xlnx_rebase_4.16.

The branch you pointed out is not directly maintained by Xen Project and 
from what you wrote below there are some differences with upstream. So 
it would be best if you speak directly with Xilinx/AMD. Stefano in CC 
should be able to assist you.
Cheers,

> Regards,
> Oleg
>
> вт, 18 апр. 2023 г. в 12:31, Oleg Nikitenko <oleshiiwood@xxxxxxxxx>:
>
> > Hi Julien,
> >
> > Thanks for the answer.
> >
> > A company's active branch is xlnx_rebase_4.16.
> > There are added there patches
> >
> >  From c14a26b9c9e6dc5711f3155e44adee8dfa634e33 Mon Sep 17 00:00:00 2001
> > From: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxxxxx>
> > Date: Mon, 25 Apr 2022 11:21:19 +0100
> > Subject: [PATCH 1/6] xen/arm: smmuv1: Remove iommu group when deassign
> >
> >  From 6a7ace399f70f0001664d727476c59f211f389f5 Mon Sep 17 00:00:00 2001
> > From: Stefano Stabellini <stefano.stabellini@xxxxxxx>
> > Date: Thu, 23 Jun 2022 11:52:47 -0700
> > Subject: [PATCH 2/6] libxl: add support for emulated TPM on ARM
> >
> >  From 6dc26f1d82a8942dc5a00c55ee29ce4be5359529 Mon Sep 17 00:00:00 2001
> > From: Tanmay Shah <tanmay.shah@xxxxxxxxxx>
> > Date: Wed, 3 Aug 2022 08:56:56 -0700
> > Subject: [PATCH 3/6] xen/eemi: Add EEMI calls to support SGI registration
> >
> >  From 9fd67311c1253a170b1364de070a7535551bba52 Mon Sep 17 00:00:00 2001
> > From: Tanmay Shah <tanmay.shah@xxxxxxx>
> > Date: Thu, 4 Aug 2022 16:34:31 -0700
> > Subject: [PATCH 4/6] xen: eemi: make xen passthrough for unknown EEMI calls
> >   from Dom0
> >
> >  From f81a621a28dfde7b8d0d5c5c125f2f250291b7e8 Mon Sep 17 00:00:00 2001
> > From: Michal Orzel <michal.orzel@xxxxxxx>
> > Date: Mon, 29 Aug 2022 15:09:07 +0200
> > Subject: [PATCH 5/6] platforms: xilinx: Add support for mapping PM nodes
> > into
> >   64-bit addresses
> >
> >  From 47ce40314bbec31b683da56d007d14603f002d0c Mon Sep 17 00:00:00 2001
> > From: Ayan Kumar Halder <ayankuma@xxxxxxx>
> > Date: Tue, 30 Aug 2022 12:48:25 +0100
> > Subject: [PATCH 6/6] Arm: Enable BOOT_PIN_CTRL for Dom0
> >
> > Regards,
> > Oleg
> >
> > вт, 18 апр. 2023 г. в 11:59, Julien Grall <julien@xxxxxxx>:
> >
> > > +Stefano, + Bertrand, +Carlo,
> > >
> > > On 18/04/2023 09:43, Oleg Nikitenko wrote:
> > > > Hello,
> > > Hi,
> > >
> > > > I tried to turn on this scheme and ran into panic.
> > > > Where was I wrong ?
> > > This feature has not been merged in Xen upstream yet. So can you tell us
> > > what patches did you apply or which tree?
> > >
> > > > Xen command line
> > > > xen,xen-bootargs = "console=dtuart dtuart=serial0 dom0_mem=1600M
> > > > dom0_max_vcpus=2 dom0_vcpus_pin bootscrub=0 vwfi=native sched=null
> > > > timer_slop=0 way_szize=65536 xen_colors=0-3 dom0_colors=4-7";
> > > Can you provide the following information:
> > >    * HW
> > >    * Where are the banks located?
> > >    * Where do you load the various modules (e.g. kernel, xen...)?
> > >
> > > > Xen config color build settings
> > > > CONFIG_COLORING=y
> > > >
> > > > Xen log:
> > > > (XEN) I/O virtualisation enabled
> > > > (XEN)  - Dom0 mode: Relaxed
> > > > (XEN) P2M: 40-bit IPA with 40-bit PA and 8-bit VMID
> > > > (XEN) P2M: 3 levels with order-1 root, VTCR 0x0000000080023558
> > > > (XEN) Scheduling granularity: cpu, 1 CPU per sched-resource
> > > > (XEN) Coloring general information
> > > > (XEN) Way size: 64kB
> > > > (XEN) Max. number of colors available: 16
> > > > (XEN) Xen color(s): [ 0 ]
> > > > (XEN) alternatives: Patching with alt table 00000000002cc690 ->
> > > > 00000000002ccc0c
> > > > (XEN) Color array allocation failed for dom0
> > > > (XEN)
> > > > (XEN) ****************************************
> > > > (XEN) Panic on CPU 0:
> > > > (XEN) Error creating domain 0
> > > > (XEN) ****************************************
> > > > (XEN)
> > > > (XEN) Reboot in five seconds...
> > > Cheers,
> > >
> > > --
> > > Julien Grall
[1] 
https://lore.kernel.org/xen-devel/20230123154735.74832-1-carlo.nonato@xxxxxxxxxxxxxxx
--
Julien Grall