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Re: [PATCH 2/2] x86/msi: Allow writes to registers on the same page as MSI-X table
- To: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Fri, 18 Nov 2022 13:33:39 +0100
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- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Fri, 18 Nov 2022 12:33:44 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 18.11.2022 13:19, Marek Marczykowski-Górecki wrote:
> On Fri, Nov 18, 2022 at 08:20:14AM +0100, Jan Beulich wrote:
>> On 17.11.2022 18:31, Marek Marczykowski-Górecki wrote:
>>> On Thu, Nov 17, 2022 at 05:34:36PM +0100, Jan Beulich wrote:
>>>> Which in turn raises the question: Do you need to handle reads
>>>> in the new code in the first place?
>>>
>>> The page not being mapped is also the reason why I do need to handle
>>> reads too.
>>
>> Just for my own clarity: You mean "not mapped to qemu" here?
>
> No, to the HVM domain (in p2m). Xen (outside of MSI-X specific code for
> HVM) doesn't know where those reads should be from.
Hmm, I was expecting them to be mapped r/o to the guest, but perhaps I'm
misremembering. Clearly both ept_p2m_type_to_flags() and
p2m_type_to_flags() take mmio_ro_ranges into consideration, which is
what I was basing my understanding on (without having looked at other
places in detail).
Jan
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