[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 1/2] hw/xen/xen_pt: Call default handler only if no custom one is set
Call pci_default_write_config() in xen_pt_pci_write_config() only for registers that do not have custom handler, and do that only after resolving them. This is important for two reasons: 1. XenPTRegInfo has ro_mask which needs to be enforced - Xen-specific hooks do that on their own (especially xen_pt_*_reg_write()). 2. Not setting value early allows the hooks to see the old value too. If it would be only about the first point, setting PCIDevice.wmask would probably be sufficient, but given the second point, restructure those writes. Signed-off-by: Marek Marczykowski-Górecki <marmarek@xxxxxxxxxxxxxxxxxxxxxx> --- hw/xen/xen_pt.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 0ec7e52183..269bd26109 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -255,6 +255,7 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, uint32_t find_addr = addr; XenPTRegInfo *reg = NULL; bool wp_flag = false; + uint32_t emul_mask = 0, write_val; if (xen_pt_pci_config_access_check(d, addr, len)) { return; @@ -310,7 +311,6 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, } memory_region_transaction_begin(); - pci_default_write_config(d, addr, val, len); /* adjust the read and write value to appropriate CFC-CFF window */ read_val <<= (addr & 3) << 3; @@ -370,6 +370,8 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, return; } + emul_mask |= ( (1 << (reg->size * 8) ) - 1 ) << ((find_addr & 3) * 8); + /* calculate next address to find */ emul_len -= reg->size; if (emul_len > 0) { @@ -396,6 +398,24 @@ static void xen_pt_pci_write_config(PCIDevice *d, uint32_t addr, /* need to shift back before passing them to xen_host_pci_set_block. */ val >>= (addr & 3) << 3; + /* store emulated registers that didn't have specific hooks */ + write_val = val; + for (index = 0; emul_mask; index += emul_len) { + emul_len = 0; + while (emul_mask & 0xff) { + emul_len++; + emul_mask >>= 8; + } + if (emul_len) { + uint32_t mask = ((1 << (emul_len * 8)) - 1); + pci_default_write_config(d, addr, write_val & mask, emul_len); + write_val >>= emul_len * 8; + } else { + emul_mask >>= 8; + write_val >>= 8; + } + } + memory_region_transaction_commit(); out: -- 2.37.3
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