Re: [XEN v2 09/12] xen/Arm: GICv3: Define GIC registers for AArch32

[Julien Grall <julien@xxxxxxx>]

Hi Ayan,

On 04/11/2022 10:04, Ayan Kumar Halder wrote:
> These registers are not used by Xen.
> Should I define these registers for the sake of completeness (to be in 
> parity with AArch64) ?
Yes. I would at least expect the MISR might end up to be used if we were 
supporting some interrupts controlled (e.g. the Apple Interrupt Controller).
Cheers,

--
Julien Grall