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Re: [PATCH v3 3/5] x86/mwait-idle: add AlderLake support
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Thu, 13 Oct 2022 13:55:11 +0200
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- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Thu, 13 Oct 2022 11:55:31 +0000
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On Thu, Aug 18, 2022 at 03:04:28PM +0200, Jan Beulich wrote:
> From: Zhang Rui <rui.zhang@xxxxxxxxx>
>
> Similar to SPR, the C1 and C1E states on ADL are mutually exclusive.
> Only one of them can be enabled at a time.
>
> But contrast to SPR, which usually has a strong latency requirement
> as a Xeon processor, C1E is preferred on ADL for better energy
> efficiency.
>
> Add custom C-state tables for ADL with both C1 and C1E, and
>
> 1. Enable the "C1E promotion" bit in MSR_IA32_POWER_CTL and mark C1
> with the CPUIDLE_FLAG_UNUSABLE flag, so C1 is not available by
> default.
>
> 2. Add support for the "preferred_cstates" module parameter, so that
> users can choose to use C1 instead of C1E by booting with
> "intel_idle.preferred_cstates=2".
>
> Separate custom C-state tables are introduced for the ADL mobile and
> desktop processors, because of the exit latency differences between
> these two variants, especially with respect to PC10.
>
> Signed-off-by: Zhang Rui <rui.zhang@xxxxxxxxx>
> [ rjw: Changelog edits, code rearrangement ]
> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> d1cf8bbfed1e
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Acked-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
Thanks, Roger.
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