[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH 00/12] Arm cache coloring
Hi Jan, On Thu, Sep 15, 2022 at 03:29:08PM +0200, Jan Beulich wrote: > On 26.08.2022 14:50, Carlo Nonato wrote: > > Shared caches in multi-core CPU architectures represent a problem for > > predictability of memory access latency. This jeopardizes applicability > > of many Arm platform in real-time critical and mixed-criticality > > scenarios. We introduce support for cache partitioning with page > > coloring, a transparent software technique that enables isolation > > between domains and Xen, and thus avoids cache interference. > > > > When creating a domain, a simple syntax (e.g. `0-3` or `4-11`) allows > > the user to define assignments of cache partitions ids, called colors, > > where assigning different colors guarantees no mutual eviction on cache > > will ever happen. This instructs the Xen memory allocator to provide > > the i-th color assignee only with pages that maps to color i, i.e. that > > are indexed in the i-th cache partition. > > > > The proposed implementation supports the dom0less feature. > > The solution has been tested in several scenarios, including Xilinx Zynq > > MPSoCs. > > Having looked at the non-Arm-specific parts of this I have one basic > question: Wouldn't it be possible to avoid the addition of entirely > new logic by treating the current model as just using a single color, > therefore merely becoming a special case of what you want? Nice question. Thanks! In principle, you are quite right: monochrome is just a degenerate choice of colouring---the colouring implementation with a single colour allows assigning all the available pages, exactly as it happens with the ordinary allocator. The difference lies in the allocation algorithm. In practice, that would be quite inefficient. This is because the allocation logic used by the coloured allocator is quite simpler, since it operates with lists, instead of binary trees. Now, upgrading the logic of the coloured allocator would be an overkill because lowering the complexity of insertion/removal operations from linear to logarithmic does not change much, since in the real world, the longest sequence of physically contiguous pages that may be assigned is max_colours - 1. Cheers. -- Marco Solieri, Ph.D. CEO & Founder Tel: +39-059-205-5182 -- Mobile: +39-349-678-66-65 -- OpenPGP: 0x75822E7E Minerva Systems SRL -- https://www.minervasys.tech Via Campi 213/B, 41125, Modena, Italy -- PIVA/CF 03996890368 ~~> Discover how to easily optimise complex embedded solutions for high-performance, safety and predictability. Together. > Plus an advanced question: In how far does this interoperate with > static allocation, which again is (for now) an Arm-only feature? > Your reference to dom0less above doesn't cover this afaict. > > Jan Attachment:
signature.asc
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |