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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v3 03/10] x86/mtrr: replace use_intel() with a local flag
On 11.09.22 12:16, Borislav Petkov wrote: On Thu, Sep 08, 2022 at 10:49:07AM +0200, Juergen Gross wrote:diff --git a/arch/x86/include/asm/cacheinfo.h b/arch/x86/include/asm/cacheinfo.h index 86b2e0dcc4bf..1aeafa9888f7 100644 --- a/arch/x86/include/asm/cacheinfo.h +++ b/arch/x86/include/asm/cacheinfo.h @@ -2,6 +2,11 @@ #ifndef _ASM_X86_CACHEINFO_H #define _ASM_X86_CACHEINFO_H+/* Kernel controls MTRR and/or PAT MSRs. */+extern unsigned int cache_generic; In the end this variable doesn't specify which caching types are available, but the ways to select/control the caching types. So what about "memory_caching_select" or "memory_caching_control" instead?
Fine with me. void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu); void cacheinfo_hygon_init_llc_id(struct cpuinfo_x86 *c, int cpu);diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.cindex 66556833d7af..3b05d3ade7a6 100644 --- a/arch/x86/kernel/cpu/cacheinfo.c +++ b/arch/x86/kernel/cpu/cacheinfo.c @@ -35,6 +35,9 @@ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); /* Shared L2 cache maps */ DEFINE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map);+/* Kernel controls MTRR and/or PAT MSRs. */+unsigned int cache_generic;This should either be __ro_after_init and initialized to 0 or you need accessors... Okay.
I'll have a look. ... Fine with me. Juergen Attachment:
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