[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 2/2] x86/vmx: implement Notify VM Exit
- To: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Fri, 20 May 2022 12:08:50 +0200
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Mzj7IhHVUpLPt/v/QrMEDI1JbRah5YZACjpeB9K8ovM=; b=BwdrrqKPtgZ3fwee8CwwGebpVcg6McDGx5u5tltz5rGSV0Kyr5iFe5nQ5WObaV7JgO54gaFtrELap3kRT50WQt5I27kfkS8GVkqqo37W8AP5cV1Qv8QfPXJpLa0shqBgk3+Ppn52oWQd2GZvDkP3wyHm5FW6AZ+3JHkhTvxKMcIptB9ekpUyzIBIR2CJVMxrUbTS9mMI/eTfhmX/bIXNhj/hQsXqChysQMBp46MNWZBiGKy27CvUM5UigiGomet6LveBfcfG2ngNxOCnnJLLTQdafGBGwBl5Ep4YbCkZp593WKtL44OiO0xGZuRTt3H8RFVa93aVAjsJu4Yp6XTyBA==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=jUzew5PX5agHCXGiTyW/Rdn7A3p7GmypdFnAnLc/Cw7b111ardGk40pUKiviGpR3PrdM33aUrPZ5hSTq1ARROcCM3/glUCbKx1JwomVtny2yAw/ef0pQ+6AbN37Meeqn261z5dKQEj5oSfKWHlEhrr2oXZBCOrdggr0MvjaaqvBONGxqsDTLZu0jVU+M38QLKIU/4IoaJX9LKz7/6KevDJQbcsGM6/9CI/sNK7/RBufatUl9LIp1Mkx1C4iVwgTFvjBLnVnTzqKwKnmdOLjUZ5CsG3FiZCeQ18F2YPEZrPvKCJj3aYR61eg/j55KLMO7IRXAgANvAXZevKnF2VhC7Q==
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, George Dunlap <George.Dunlap@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Jun Nakajima <jun.nakajima@xxxxxxxxx>, Kevin Tian <kevin.tian@xxxxxxxxx>
- Delivery-date: Fri, 20 May 2022 10:09:13 +0000
- Ironport-data: A9a23:VqugJ6megKO59LiYI0xdtrzo5gxDJ0RdPkR7XQ2eYbSJt1+Wr1Gzt xIaC2nSOvbcY2ehfo1xYI638UpS6sPcn4c1TFA9rS09HiMWpZLJC+rCIxarNUt+DCFioGGLT Sk6QoOdRCzhZiaE/n9BCpC48T8kk/vgqoPUUIYoAAgoLeNfYHpn2EsLd9IR2NYy24DkWlLV4 7senuWEULOb828sWo4rw/rrRCNH5JwebxtB4zTSzdgS1LPvvyF94KA3fMldHFOhKmVgJcaoR v6r8V2M1jixEyHBqD+Suu2TnkUiGtY+NOUV45Zcc/DKbhNq/kTe3kunXRa1hIg+ZzihxrhMJ NtxWZOYRDsNG6/MifUhCyZRLTBSbaMB2r7+Pi3q2SCT5xWun3rE5dxLVRhzEahGv+F9DCdJ6 OASLy0LYlabneWqzbmnS+5qwMM+MM3sO4BZsXZlpd3bJa9+HdafHOOXupkBg2hYasNmRJ4yY +IDbjVidlLYagBnMVYLEpMu2uyvgxETdhUH8QzO+PFuuAA/yiRX7b+1Hf3/XubXeucMkhuFh 2vY7ljQV0Ry2Nu3jGDtHmiXru3FkD7/WYkSPKal7fMsi1qWrkQDBRtTWValrP2Rjk+lR8kZO 0ES4jApr6U56AqsVNaVdx+lpH+JuDYMVtwWFPc1gCmW0bbd6QudAmkCTxZCZcYguctwQiYlv neWm/v5CDopt6eaIVqf67HSqzqxMCoUKGYqZCkYQA9D6N7myKkwgwzOSJB/EaezptzzBTz0h TuNqUADa647iMcK0+C3+A7Bijf1/5zRFFdquUPQQ36v6R5/aMi9fYu05FPH7PFGaoGEUl2Gu 3tCkM+bhAwTMayweOW2aL1lNNmUCzytaVUwXXYH80EdygmQ
- Ironport-hdrordr: A9a23:nijMOKCkw+qba5HlHeglsceALOsnbusQ8zAXPh9KJCC9I/bzqy nxpp8mPH/P5wr5lktQ/OxoHJPwOU80kqQFmrX5XI3SJTUO3VHFEGgM1+vfKlHbak7DH6tmpN 1dmstFeaLN5DpB/KHHCWCDer5PoeVvsprY49s2p00dMT2CAJsQizuRZDzrcHGfE2J9dOcE/d enl4J6T33KQwVlUu2LQl0+G8TTrdzCk5zrJTYAGh4c8QGLyRel8qTzHRS01goXF2on+8ZpzU H11yjCoomzufCyzRHRk0fV8pRtgdPkjv9OHtaFhMQ5IijlziyoeINicbufuy1dmpDl1H8a1P 335zswNcV67H3cOkmzvBvWwgHllA0j7nfzoGXo9kfLkIjcfnYXGsBBjYVWfl/y8Ew7puxx16 pNwiawq4dXJQmoplWy2/H4EzVR0makq3srluAey1ZFV5EFVbNXpYsDuGtIDZY7Gj7g4oxPKp ggMCjl3ocXTbqmVQGbgoE2q+bcHEjbXy32DnTqg/blkgS/xxtCvg4lLM92pAZ1yHtycegB2w 3+CNUYqFh/dL5pUUtDPpZwfSKWMB26ffueChPaHbzYfJt3SU7lmtrQ3Igfwt2MVdgh8KYS8a 6xJW+w81RCNn7TNQ==
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Thu, May 19, 2022 at 04:45:20PM +0200, Roger Pau Monné wrote:
> On Thu, May 19, 2022 at 12:10:24AM +0000, Andrew Cooper wrote:
> > On 17/05/2022 14:21, Roger Pau Monne wrote:
> > > @@ -1333,6 +1338,19 @@ static int construct_vmcs(struct vcpu *v)
> > > rc = vmx_add_msr(v, MSR_FLUSH_CMD, FLUSH_CMD_L1D,
> > > VMX_MSR_GUEST_LOADONLY);
> > >
> > > + if ( cpu_has_vmx_notify_vm_exiting && vm_notify_window >= 0 )
> > > + {
> > > + __vmwrite(NOTIFY_WINDOW, vm_notify_window);
> > > + /*
> > > + * Disable #AC and #DB interception: by using VM Notify Xen is
> > > + * guaranteed to get a VM exit even if the guest manages to lock
> > > the
> > > + * CPU.
> > > + */
> > > + v->arch.hvm.vmx.exception_bitmap &= ~((1U << TRAP_debug) |
> > > + (1U <<
> > > TRAP_alignment_check));
> > > + vmx_update_exception_bitmap(v);
> >
> > IIRC, it's not quite this easy. There are conditions, e.g. attaching
> > gdbsx, where #DB interception wants turning on/off dynamically, and the
> > logic got simplified to nothing following XSA-156, so will need
> > reintroducing.
> >
> > AMD Milan (Zen3) actually has NoNestedDataBp in CPUID.80000021.eax[0]
> > which allows us to not intercept #DB, so perhaps that might offer an
> > easier way of adjusting the interception logic. (Or maybe not. I can't
> > remember).
>
> OK, will look into it.
So after taking a look, I think we need to modify vmx_update_debug_state() so
it's:
void vmx_update_debug_state(struct vcpu *v)
{
unsigned int mask = 1u << TRAP_int3;
if ( v->arch.hvm.vmx.secondary_exec_control &
SECONDARY_EXEC_NOTIFY_VM_EXITING )
/*
* Only allow toggling TRAP_debug if notify VM exit is enabled, as
* unconditionally setting TRAP_debug is part of the XSA-156 fix.
*/
mask |= 1u << TRAP_debug;
if ( v->arch.hvm.debug_state_latch )
v->arch.hvm.vmx.exception_bitmap |= mask;
else
v->arch.hvm.vmx.exception_bitmap &= ~mask;
[...]
I'm however confused by the usage of cpu_has_monitor_trap_flag
previous to XSA-156, which was:
void vmx_update_debug_state(struct vcpu *v)
{
unsigned long mask;
mask = 1u << TRAP_int3;
if ( !cpu_has_monitor_trap_flag )
mask |= 1u << TRAP_debug;
Was it fine to not set TRAP_debug only if cpu_has_monitor_trap_flag
is supported by the CPU? (even if not currently set on
secondary_exec_control)?
Thanks, Roger.
|