[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v4] vpci/msix: fix PBA accesses
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- Date: Tue, 8 Mar 2022 10:05:12 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=YNnwGePBMn/RtJGeSRzZsxRbI8wWIAT9UcWf2v/fO+M=; b=IVF8AIo2s2CBry98y1/hQJsvHvpjk7juTZq8iMf7/v70YdXl+LDL0z73ulEF6FPzwI/Jje6YYayyJE7RxvfgP5zwHjJWgupKr+1JveopHTHvOnB6YfERboDOCwL1chDLTDBo8lcp+L2wciZ6wBNfz9TYotd3YObnHcOfu/j6GvIY3qbm8RfeZtw19JlcFJ5Cd8e1hHau1+se6RFru/krY3BLDIlg7oPccmLe7HGze0oWJi/yuZaANTzBOnBGYqm0WcEhoY9H/7KUC+GScxeyiZlTHDQLm43C+6eRJpf3egl+yb9aYys3yb+fCsa2y3Th7elGLB1mGzZklhXSz/12sw==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=dE/dUvw0Ws1HbN/eLLk7Qs84bs3Ghnzl8FkCNwKz8jSSktpte06XvtTIRcxkOWVlYXLmw9U+ta8vlhHJnM9lr1uA3UHVlBfdZYQtUw2JmxINh1QAnbIKuOVApxt6Brgvz0eEYpfUok98/VpaQSKoWd1JKnjPh8nLBqPA+6rGOHMZjipOwROT3xHBuZDjY3OKwGUtwqJDHyYGclb35bEhZxjEN8MPLK41Dsi/mS1w+htVXxX/8zXj7p8cYkfqtJFugZfFkNo3W8LSZoNypvXLJcMxIeE8jc3lLfZOhziEZBjCEQ5seachNOWWoMRaEQcEq+b1I85xh2es5lKe07iz8w==
- Authentication-results: esa5.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: Alex Olson <this.is.a0lson@xxxxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Tue, 08 Mar 2022 09:05:32 +0000
- Ironport-data: A9a23:S24Frqmk4c10ChBSm/0Q0JXo5gylJkRdPkR7XQ2eYbSJt1+Wr1Gzt xIWCjvVP/vZNGPxf9slO4nn8xsBvcCGm99kTVdoqyw2FyMWpZLJC+rCIxarNUt+DCFioGGLT Sk6QoOdRCzhZiaE/n9BCpC48T8kk/vgqoPUUIYoAAgoLeNfYHpn2EoLd9IR2NYy24DiW1PV4 LsenuWEULOb828sWo4rw/rrRCNH5JwebxtB4zTSzdgS1LPvvyF94KA3fMldHFOhKmVgJcaoR v6r8V2M1jixEyHBqD+Suu2TnkUiGtY+NOUV45Zcc/DKbhNq/kTe3kunXRa1hIg+ZzihxrhMJ NtxWZOYFD8Rfer0ouokYxxRSiF7Z6JIp+bWLi3q2SCT5xWun3rExvxvCAc9PJEC+/YxCmZLn RAaAGlTNFbZ3bvwme/lDLk37iggBJCD0Ic3oHZvwCufFf87aZvCX7/L9ZlT2zJYasVmQ6uHO ZFEM2QHgBLoSkUfPVALGq0F39zx3CL/bRIHmkKwuv9ii4TU5FMoi+W8WDbPQfSaSMMQkkuGq 2bu+2XiHgpcJNGZ0SCC8H+nmqnIhyyTcJ4SFab+9+UsiQWX3WsVIBITXFq/5/K+jyaWWdhSN kgV8SoGtrUp+QqgSdyVYvGjiCfa5FhGAYMWSrBkrlHWokbJ3+qHLjU8dn0GUOYojf8zTGUq0 wWGkYywFDM65dV5Vkmh3ruTqDqzPw0cImkDeTIIQGM53jXznG0gpkmRF4g+ScZZmvWwQGitm G7S8EDSkp1O1ZZj6kmtwbzQb9tATLDtRxV92AjYV3nNAuhRNN/8PNzABbQ2AJ99wGelorup4 SBsdyu2trlm4XSxeMqlGr1l8FaBvartDdEkqQQzd6TNDhz0k5JZQahe4StlOGBiOdsedDnib Sf74F0NusEMbCbxNP8qOOpd7vjGK4C6TrwJsdiOMrJzjmVZLlfbrEmCm2bKt4wSrKTcuf5mY srKGSpdJX0bFb5m3FKLqxQ1itcWKtQF7TqLH/jTlk3/uZLHPSL9YepVYTOmM7FihIvZ8Vq9z jqqH5bTo/mpeLalOXe/HE96BQ1iEEXX8riq85wHLLDSeFE6cIzjYteIqY4cl0Vet/09vs/D/ 22nW18ez1z6hHbdLh6NZGwlY7TqNauTZ1piVcDwFT5EA0QeXLs=
- Ironport-hdrordr: A9a23:DVgvtKPR/p0JzMBcTyP155DYdb4zR+YMi2TDiHofdfUFSKClfp 6V8cjztSWUtN4QMEtQ/uxoHJPwO080kqQFnLX5XI3SJzUO3VHHEGgM1/qB/9SNIVyaygcZ79 YdT0EcMqyAMbEZt7eC3ODQKb9Jq7PmgcOVbKXlvg9QpGlRGt9dBmxCe2Cm+yNNNW177c1TLu vi2iMLnUvpRV0nKuCAQlUVVenKoNPG0LrgfB49HhYirC2Dlymh5rLWGwWRmk52aUIE/Z4StU z+1yDp7KSqtP+2jjfaym/o9pxT3P/s0MFKCsCggtUcbh/slgGrToJ8XKDqhkF/nMifrHIR1P XcqRYpOMp+r1vXY2GOuBPonzLt1T4/gkWSvmOwsD/Gm4jUVTg6A81OicZyaR3C8Xctu9l6ze Ziw3+Zn4A/N2KOoA3No/zzEz16nEu9pnQv1cQJiWZEbIcYYLhN6aQC4UJuFosaFi6S0vFqLA BXNrCc2B9qSyLbU5iA1VMfg+BEH05DUytue3Jy9PB8iFNt7TJEJ0hx/r1qop5PzuN5d3B+3Z W2Dk1ZrsA/ciYoV9MOOA4ge7rANoWfe2OEDIqtSW6XYZ3vfUi976LK3A==
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On Tue, Mar 08, 2022 at 09:31:34AM +0100, Jan Beulich wrote:
> On 07.03.2022 17:37, Roger Pau Monne wrote:
> > Map the PBA in order to access it from the MSI-X read and write
> > handlers. Note that previously the handlers would pass the physical
> > host address into the {read,write}{l,q} handlers, which is wrong as
> > those expect a linear address.
> >
> > Map the PBA using ioremap when the first access is performed. Note
> > that 32bit arches might want to abstract the call to ioremap into a
> > vPCI arch handler, so they can use a fixmap range to map the PBA.
> >
> > Reported-by: Jan Beulich <jbeulich@xxxxxxxx>
> > Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
>
> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
>
> > Cc: Alex Olson <this.is.a0lson@xxxxxxxxx>
>
> I'll wait a little with committing, in the hope for Alex to re-provide
> a Tested-by.
>
> > --- a/xen/drivers/vpci/msix.c
> > +++ b/xen/drivers/vpci/msix.c
> > @@ -182,6 +182,38 @@ static struct vpci_msix_entry *get_entry(struct
> > vpci_msix *msix,
> > return &msix->entries[(addr - start) / PCI_MSIX_ENTRY_SIZE];
> > }
> >
> > +static void __iomem *get_pba(struct vpci *vpci)
> > +{
> > + struct vpci_msix *msix = vpci->msix;
> > + /*
> > + * PBA will only be unmapped when the device is deassigned, so access
> > it
> > + * without holding the vpci lock.
> > + */
> > + void __iomem *pba = read_atomic(&msix->pba);
> > +
> > + if ( likely(pba) )
> > + return pba;
> > +
> > + pba = ioremap(vmsix_table_addr(vpci, VPCI_MSIX_PBA),
> > + vmsix_table_size(vpci, VPCI_MSIX_PBA));
> > + if ( !pba )
> > + return read_atomic(&msix->pba);
> > +
> > + spin_lock(&vpci->lock);
> > + if ( !msix->pba )
> > + {
> > + write_atomic(&msix->pba, pba);
> > + spin_unlock(&vpci->lock);
> > + }
> > + else
> > + {
> > + spin_unlock(&vpci->lock);
> > + iounmap(pba);
> > + }
>
> TBH I had been hoping for just a single spin_unlock(), but you're
> the maintainer of this code ...
Would you prefer something like:
spin_lock(&vpci->lock);
if ( !msix->pba )
write_atomic(&msix->pba, pba);
spin_unlock(&vpci->lock);
if ( read_atomic(&msix->pba) != pba )
iounmap(pba);
?
Thanks, Roger.
|