|
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH 2/8] x86/boot: Collect AMD speculative features earlier during boot
All AMD IBRS-related features are in CPUID.0x80000008.ebx. Collect them in
early_cpu_init() so init_speculative_mitigations() can use them.
Rework the existing logic structure to fill in c->extended_cpuid_level and
separate out the ambiguous use of ebx in an otherwise 0x80000008-specific
logic block.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>
CC: Wei Liu <wl@xxxxxxx>
---
xen/arch/x86/cpu/common.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 4a163afbfc7e..866f1a516447 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -348,9 +348,13 @@ void __init early_cpu_init(void)
}
eax = cpuid_eax(0x80000000);
- if ((eax >> 16) == 0x8000 && eax >= 0x80000008) {
- ebx = eax >= 0x8000001f ? cpuid_ebx(0x8000001f) : 0;
- eax = cpuid_eax(0x80000008);
+ if ((eax >> 16) == 0x8000)
+ c->extended_cpuid_level = eax;
+
+ if (c->extended_cpuid_level >= 0x80000008) {
+ cpuid(0x80000008, &eax,
+ &c->x86_capability[cpufeat_word(X86_FEATURE_CLZERO)],
+ &ecx, &edx);
paddr_bits = eax & 0xff;
if (paddr_bits > PADDR_BITS)
@@ -363,10 +367,11 @@ void __init early_cpu_init(void)
hap_paddr_bits = ((eax >> 16) & 0xff) ?: paddr_bits;
if (hap_paddr_bits > PADDR_BITS)
hap_paddr_bits = PADDR_BITS;
+ }
+ if (c->extended_cpuid_level >= 0x8000001f)
/* Account for SME's physical address space reduction. */
- paddr_bits -= (ebx >> 6) & 0x3f;
- }
+ paddr_bits -= (cpuid_ebx(0x8000001f) >> 6) & 0x3f;
if (!(c->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)))
park_offline_cpus = opt_mce;
--
2.11.0
|
![]() |
Lists.xenproject.org is hosted with RackSpace, monitoring our |