[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 3/3] HACK: allow adding an offset to the x2APIC ID
- To: <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Roger Pau Monne <roger.pau@xxxxxxxxxx>
- Date: Thu, 20 Jan 2022 16:23:19 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ABP7/Br+owApC9qj4NTH4SDtKCbcra77tGh7FujuLWU=; b=k5vV/Oh8bg3Twm6g9FwI/ZqsDCY4+bB34ckDh/iyv2Vnc/R3mqiyoOAyUmIBsDq+UQha05QHw6Doqnp69WGLcE8Qw4Fkl1N/lL1u904eB4chK1IprbkquSYZNbXKGmR2s0gxfystrha6yL6vGBUPGDP2H3clMlWLpiO3bnkAFlMM1N3X8jkNQTCrEXsm9sPtGYeobZVCzS028v9SJHIhry/rSa0EH1LcM0CQlvzqtVaD0WuiN1/Vzvkj8yNv4APpY3WZ2BDCdkHI9AOpAZpywpLr2IGn5Q9mCqo6Yd7MLTu/5opSJs22yyNniIvJMa0J6Dmfzh5UFM8l3tPv1j4JXQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=fAA6/hyJe/xMcKlts8mf4I9Zr6c7j31+iNZbjTOO1Nd3J584XqsDgsFrcMqgrWxtWDtCkk9Nky8BYPQHjCV/kFPiECsH+r7MFflU/rU+Dg0DsJoTFKR0aNYkW8gGQOt3TF7ZPqJhWmZX8jeori9iyphpoHh5Ixfz21D3Onx87Xk6crqE+3KkGD66CbdX9jHAyQt1drafFfnhznmmA1R9N6iuPyhTENRhZQTWfEb0rMiF3Hi5mVCWudXRd61q5Sf491XrFdb2YxPgcgvpNNxNllA7v5gUsVk44KdVtyQ2NZsr0twa1CHV8hNmkOXNM/d4+41y9EgxtAIstoUYH217tA==
- Authentication-results: esa2.hc3370-68.iphmx.com; dkim=pass (signature verified) header.i=@citrix.onmicrosoft.com
- Cc: Roger Pau Monne <roger.pau@xxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>
- Delivery-date: Thu, 20 Jan 2022 15:24:40 +0000
- Ironport-data: A9a23:h/u3x6DqE0x5SRVW/8jkw5YqxClBgxIJ4kV8jS/XYbTApD8i32NUy DFJUTzTP6vcNDPwKt0jOoq38UgH65bXndIyQQY4rX1jcSlH+JHPbTi7wuYcHM8wwunrFh8PA xA2M4GYRCwMo/u1Si6FatANl1ElvU2zbue6WL6s1hxZH1c+En9400o7wYbVv6Yz6TSHK1LV0 T/Ni5W31G+Ng1aY5UpNtspvADs21BjDkGtwUm4WPJinj3eH/5UhN7oNJLnZEpfNatI88thW5 Qr05OrREmvxp3/BAz4++1rxWhVirrX6ZWBihpfKMkQLb9crSiEai84G2PQghUh/tRCjvtQp9 et2lY2IUVktOe6WtctFakwNe81+FfUuFL7vJHG+tYqYzlHccmuqyPJrZK00FdRGoKAtWzgIr KFGbmBWBvyAr7veLLaTUO5ji95lNMD2FIgepmth3XfSCvNOrZXrHf+WvIMGhW5YasZmB8/xW o0QUBZUQxmdeQxwGl0XJ7Ajg7L97pX4W2IB8w/EzUYt2EDMyCRh3b6rN8DaEvSIT8hImkeTp krd4n/0RBodMbS32TeDt36hmOLLtSf6Q54JUq218OZwh1+ezXBVDwcZPWZXutHg1BT4AYgGb RVJpGx+9sDe6XBHUPHDejeZpCa5gCU8SuJITek9q1ug5fLttlPx6nc/chZNb9kvtckTTDMs1 0OUk96BOQGDoIF5WlrGqO7K8Gra1Tw9aDZbOHRaFVdtD8zL+dlr1nryosBf/LlZZzEfMRX52 Hi0oSc3nN3/ZuZbhvzgrTgrb99Bz6UlrzLZBC2LDwpJDSsjPeZJgrBED3CBsZ6sy67DHzG8U IAswZT20Qz3JcjleNaxaOsMBqq1wP2OLSfRh1Vid7F4qWj3pSf8LdwOvGguTKuMDiriUWW1C KM0kVgJjKK/wVPwNfMnC25PI5lCIVfc+STNCamPM4smjmlZfw6b5iB+DXN8LEi2+HXAZZoXY M/BGe71VC5yIf0+kFKeGrlBuZd2mHFW7T6DFPjTkkX8uZLDNSH9dFvwGAbUBgzPxPna8Fy9H hc2H5bi9iizp8WnMnCIqtZCdA5TRZX5bLivw/Fqmie4ClMOMEkqCuPLwKNnfIpgnq9PkfzP8 G37UUhdoGcTT1WeQelTQnw8Or7pQ7hlqnc3YX4lMVqygiBxaoez9qYPMZAweOB/puBkyPd1S dgDetmBXasTGmiWpWxFYMmvtpFmeTSqmRmKY3ivbg8gcsMyXAfO4NLlIFfirXFcEiqtuMIii LS8zQeHE4EbTgFvAZ+OOvKixl+8p1YHn+d2UxeaK9VfYhy0ooNrNzbwnrk8JMRVcUfPwT6T1 gC3BxYEpLaS/99poYeR3a3d9tWnCepzGEZeDlL317fuOHmI5HenzK9BTP2MIWLXWlTr9fjwf u5S1fz9bqEKxQ4Yr4pmHr935qsi/N+z9aRCxwFpEXiXPVSmDrRsfiuP0cVV7/Afw7ZYvU29W 16V+8kcMrKMYZu3HFkULQsjT+KCyfBLxWWCsaVreB33tH1t4b6KcUROJB3d2iVSIYx8PJ4h3 ep86tUd7Bayi0ZyP9uL5syOG79g8pDUv30bi6wn
- Ironport-hdrordr: A9a23:znjMIqt+J2lty3M8cgjdScSW7skC7IMji2hC6mlwRA09TyXGra 6TdaUguiMc1gx8ZJhBo7C90KnpewK6yXcT2/hsAV7CZniYhILMFuBfBOTZskTd8kHFh4tgPO JbAtJD4b7LfChHZKTBkXGF+r8bqbHtms3Y5pa9854ud3AWV0gJ1XYJNu/xKDwReOApP+tcKH LKjfA32QZINE5nJPiTNz0gZazuttfLnJXpbVovAAMm0hCHiXeN5KThGxaV8x8CW3cXqI1SvV Ttokjc3OGOovu7whjT2yv66IlXosLozp9mCNaXgsYYBz3wgkKDZZhnWZeFoDcpydvfpWoCoZ 3pmVMNLs5z43TeciWcpgbs4RDp1HIU53rr2Taj8DLeiP28YAh/J9tKhIpffBecwVEnpstA3K VC2H/cn4ZLDDvb9R6NpuTgZlVPrA6ZsHAimekcgzh0So0FcoJcqoQZ4Qd8DIoAJiTn84oqed MeQv003MwmMm9yUkqp/FWGmLeXLzEO91a9Mwc/U/WuonhrdCsT9Tpd+CQd9k1wgq7VBaM0oN gsCZ4Y5o2mePVmGp6VNN1xMvdfNVa9NC4kSFjiWmgPNJt3c04l+KSHq4nc2omRCeg1Jd0J6d L8bG8=
- Ironport-sdr: N9XddzcHgt/QmCskYWkQuzs662NBi30PHrU1coqx5L7XoUUh+1Lp2IMQK1oXtKkKRF0AHmZsBt sDUnH5dXfZLKoENJz5g1ZhaAUl/OHjZ0NaeZPjZRVEFOEYH8I7Hy6lq6Nk2WppU+WSNVgqrO3y Yn3QPDyTIszwHNq/O8EsPiwoNtrFeD3gXweV0C9l186DFz9GmdtwNr32eBZnqbVnS55KRjKvFo i15HlKYQ1Jy0mIabSqBQoKDgp4Mlx5SEozrP1fKCJE1D1IWwat96QH1N5xINgDbQsDbaQEowwx tNpitsnNOE0sJZ+JuPjrFW+H
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
In order to test external interrupts using a destination ID > 255.
Also start vCPUs with the APIC in x2APIC mode.
---
xen/arch/x86/cpuid.c | 12 +++++++++++-
xen/arch/x86/hvm/dom0_build.c | 3 ++-
xen/arch/x86/hvm/vlapic.c | 14 ++++++++++++--
xen/arch/x86/include/asm/hvm/vlapic.h | 2 ++
4 files changed, 27 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 0407a54626..01dcd474e8 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -8,6 +8,7 @@
#include <asm/hvm/nestedhvm.h>
#include <asm/hvm/svm/svm.h>
#include <asm/hvm/viridian.h>
+#include <asm/hvm/vlapic.h>
#include <asm/hvm/vmx/vmcs.h>
#include <asm/paging.h>
#include <asm/processor.h>
@@ -876,7 +877,14 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
/* TODO: Rework topology logic. */
res->b &= 0x00ffffffu;
if ( is_hvm_domain(d) )
- res->b |= (v->vcpu_id * 2) << 24;
+ {
+ unsigned int id = v->vcpu_id * 2;
+
+ if ( id )
+ id += opt_x2apic_id_offset;
+
+ res->b |= id << 24;
+ }
/* TODO: Rework vPMU control in terms of toolstack choices. */
if ( vpmu_available(v) &&
@@ -1058,6 +1066,8 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
/* Fix the x2APIC identifier. */
res->d = v->vcpu_id * 2;
+ if ( res->d )
+ res->d += opt_x2apic_id_offset;
}
break;
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 43e1bf1248..b00e45885c 100644
--- a/xen/arch/x86/hvm/dom0_build.c
+++ b/xen/arch/x86/hvm/dom0_build.c
@@ -30,6 +30,7 @@
#include <asm/bzimage.h>
#include <asm/dom0_build.h>
#include <asm/hvm/support.h>
+#include <asm/hvm/vlapic.h>
#include <asm/io_apic.h>
#include <asm/p2m.h>
#include <asm/paging.h>
@@ -845,7 +846,7 @@ static int __init pvh_setup_acpi_madt(struct domain *d,
paddr_t *addr)
x2apic->header.type = ACPI_MADT_TYPE_LOCAL_X2APIC;
x2apic->header.length = sizeof(*x2apic);
x2apic->uid = i;
- x2apic->local_apic_id = i * 2;
+ x2apic->local_apic_id = i * 2 + (i ? opt_x2apic_id_offset : 0);
x2apic->lapic_flags = ACPI_MADT_ENABLED;
x2apic++;
}
diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index b8c84458ff..34209d5378 100644
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -24,6 +24,7 @@
#include <xen/domain_page.h>
#include <xen/event.h>
#include <xen/nospec.h>
+#include <xen/param.h>
#include <xen/trace.h>
#include <xen/lib.h>
#include <xen/sched.h>
@@ -53,6 +54,9 @@
(LVT_MASK | APIC_MODE_MASK | APIC_INPUT_POLARITY |\
APIC_LVT_REMOTE_IRR | APIC_LVT_LEVEL_TRIGGER)
+unsigned int opt_x2apic_id_offset;
+integer_param("x2apic_id_offset", opt_x2apic_id_offset);
+
static const unsigned int vlapic_lvt_mask[VLAPIC_LVT_NUM] =
{
/* LVTT */
@@ -1073,7 +1077,7 @@ static void set_x2apic_id(struct vlapic *vlapic)
u32 id = vlapic_vcpu(vlapic)->vcpu_id;
u32 ldr = ((id & ~0xf) << 12) | (1 << (id & 0xf));
- vlapic_set_reg(vlapic, APIC_ID, id * 2);
+ vlapic_set_reg(vlapic, APIC_ID, id * 2 + (id ? opt_x2apic_id_offset : 0));
vlapic_set_reg(vlapic, APIC_LDR, ldr);
}
@@ -1443,7 +1447,13 @@ void vlapic_reset(struct vlapic *vlapic)
if ( v->vcpu_id == 0 )
vlapic->hw.apic_base_msr |= APIC_BASE_BSP;
- vlapic_set_reg(vlapic, APIC_ID, (v->vcpu_id * 2) << 24);
+ /* start in x2APIC mode. */
+ vlapic->hw.apic_base_msr |= APIC_BASE_EXTD;
+ set_x2apic_id(vlapic);
+#if 0
+ vlapic_set_reg(vlapic, APIC_ID, id << 24);
+#endif
+
vlapic_do_init(vlapic);
}
diff --git a/xen/arch/x86/include/asm/hvm/vlapic.h
b/xen/arch/x86/include/asm/hvm/vlapic.h
index 8f908928c3..6e837cb5bf 100644
--- a/xen/arch/x86/include/asm/hvm/vlapic.h
+++ b/xen/arch/x86/include/asm/hvm/vlapic.h
@@ -91,6 +91,8 @@ struct vlapic {
} init_sipi;
};
+extern unsigned int opt_x2apic_id_offset;
+
/* vlapic's frequence is 100 MHz */
#define APIC_BUS_CYCLE_NS 10
--
2.34.1
|