[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [PATCH] x86/Intel: use CPUID bit to determine PPIN availability
As of SDM revision 076 there is a CPUID bit for this functionality. Use it to amend the existing model-based logic. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> --- In xen-cpuid.c I wasn't sure whether it's better to put the 7b1 table next to the 7a1 one, or whether tables should continue to be placed by feature set ABI identifier. --- a/tools/misc/xen-cpuid.c +++ b/tools/misc/xen-cpuid.c @@ -156,7 +156,7 @@ static const char *const str_e8b[32] = [18] = "ibrs-fast", [19] = "ibrs-same-mode", [20] = "no-lmsl", - /* [22] */ [23] = "ppin", + /* [22] */ [23] = "amd-ppin", [24] = "amd-ssbd", [25] = "virt-ssbd", [26] = "ssb-no", [28] = "psfd", @@ -188,6 +188,11 @@ static const char *const str_7a1[32] = [12] = "fsrcs", }; +static const char *const str_7b1[32] = +{ + [ 0] = "intel-ppin", +}; + static const char *const str_e21a[32] = { [ 2] = "lfence+", @@ -212,6 +217,7 @@ static const struct { { "0x00000007:0.edx", "7d0", str_7d0 }, { "0x00000007:1.eax", "7a1", str_7a1 }, { "0x80000021.eax", "e21a", str_e21a }, + { "0x00000007:1.ebx", "7b1", str_7b1 }, }; #define COL_ALIGN "18" --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -865,6 +865,13 @@ static void intel_init_ppin(const struct { uint64_t val; + default: + if ( !cpu_has(c, X86_FEATURE_INTEL_PPIN) ) + { + ppin_msr = 0; + return; + } + fallthrough; case 0x3e: /* IvyBridge X */ case 0x3f: /* Haswell X */ case 0x4f: /* Broadwell X */ --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -299,6 +299,9 @@ XEN_CPUFEATURE(FSRCS, 10*32+12) / XEN_CPUFEATURE(LFENCE_DISPATCH, 11*32+ 2) /*A LFENCE always serializing */ XEN_CPUFEATURE(NSCB, 11*32+ 6) /*A Null Selector Clears Base (and limit too) */ +/* Intel-defined CPU features, CPUID level 0x00000007:1.ebx, word 12 */ +XEN_CPUFEATURE(INTEL_PPIN, 12*32+ 0) /* Protected Processor Inventory Number */ + #endif /* XEN_CPUFEATURE */ /* Clean up from a default include. Close the enum (for C). */ --- a/xen/include/xen/lib/x86/cpuid.h +++ b/xen/include/xen/lib/x86/cpuid.h @@ -16,6 +16,7 @@ #define FEATURESET_7d0 9 /* 0x00000007:0.edx */ #define FEATURESET_7a1 10 /* 0x00000007:1.eax */ #define FEATURESET_e21a 11 /* 0x80000021.eax */ +#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */ struct cpuid_leaf { @@ -188,6 +189,10 @@ struct cpuid_policy uint32_t _7a1; struct { DECL_BITFIELD(7a1); }; }; + union { + uint32_t _7b1; + struct { DECL_BITFIELD(7b1); }; + }; }; } feat;
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