[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH 2/3] x86/HVM: fail virt-to-linear conversion for insn fetches from non-code segments
- To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Fri, 3 Dec 2021 12:22:37 +0100
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=suse.com; dmarc=pass action=none header.from=suse.com; dkim=pass header.d=suse.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=x2S2aIcZK036FRm3DGzFftaBrE1z/LAoM88V/xmz2FM=; b=XzRPudmb5wm+F4jIINIOPj4ylUibqYHhJsV2iN2o+q6XBumCHOvFF6BxUx7pgyELeGcAVUUEsLtSENGaDLkUcU9OQ/YhGoJhCJijqrzEwMpGaWsaALBZrjmDwQ/xn5bBFmLhTQQ2DLRF5mxF1vYY6I7ff9wOsBAFU31HMy4OAPnApvM/hYwtTzKj7+8mkRElWCnvfcjbrqEArMHWdF5mXqL+0d4EjAYCmG4Zs/8Rj6SDbzGBinbbTR0pR+sBLaKg+cLdkUKMj9T7k4NdLKQakFrC/vYTtVneMBBXXSJMtmrB7h098gd2iv+Ve33aMJj+w6prvnvZev8hw2Grf+UYog==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=RPAp4KGTOd3ZP8ae8K5FEFuhs4c+qOLiFRnj6UpE0ko2IiXI3fwCOOpWv721KpGw2QN9iaRI5aEYF6nDjLfzEj6ETJq7UqAzF7ymKQmr27aOATz951vVJ0TFGIfWntOrvnry2DNfQjd9LuIrKvsJoVcXlT8ja9YANAdQhN1WD5lOWsQPTHoDjGPfE6tDyx7KN2KTnOWlSa8DrHA3MZZIipd1KQDFcQMF/3xWweIE6H44wWp8Buj0nGkcDFWOuV0bFVOJHNENeLWwrscWeZJtdgmTTdAXsyh/lze6F2AuFVKucvhdZpP45qDYxF1l3PgbKPkQm7q1Q+o5KoXZwKW2uA==
- Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com;
- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Paul Durrant <paul@xxxxxxx>
- Delivery-date: Fri, 03 Dec 2021 11:22:48 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
Just like (in protected mode) reads may not go to exec-only segments and
writes may not go to non-writable ones, insn fetches may not access data
segments.
Fixes: 623e83716791 ("hvm: Support hardware task switching")
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -2551,6 +2551,9 @@ bool hvm_vcpu_virtual_to_linear(
*/
ASSERT(seg < x86_seg_none);
+ /* However, check that insn fetches only ever specify CS. */
+ ASSERT(access_type != hvm_access_insn_fetch || seg == x86_seg_cs);
+
if ( !(v->arch.hvm.guest_cr[0] & X86_CR0_PE) )
{
/*
@@ -2615,10 +2618,17 @@ bool hvm_vcpu_virtual_to_linear(
if ( (reg->type & 0xa) == 0x8 )
goto out; /* execute-only code segment */
break;
+
case hvm_access_write:
if ( (reg->type & 0xa) != 0x2 )
goto out; /* not a writable data segment */
break;
+
+ case hvm_access_insn_fetch:
+ if ( !(reg->type & 0x8) )
+ goto out; /* not a code segment */
+ break;
+
default:
break;
}
|